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Stack Memory

Stack Memory. 00000 H. 00001 H. 01058 H. TOS. SS. 0105. SP. 0008. 1104F H. BOS. FFFFE H. BOS = 01050+FFFF = 1104F H. FFFFF H. Before execution. After execution. XX H. XX H. XX H. XX H. XX H. 1055 H. 1055 H. XX H. 34 H. 1056 H. 1056 H. TOS. XX H. 12 H.

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Stack Memory

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  1. StackMemory 00000H 00001H 01058H TOS SS 0105 SP 0008 1104FH BOS FFFFEH BOS = 01050+FFFF = 1104FH FFFFFH

  2. Before execution After execution XXH XXH XXH XXH XXH 1055H 1055H XXH 34H 1056H 1056H TOS XXH 12H 1057H 1057H XXH 1058H XXH 1058H XXH XXH XXH AX 1234H PUSH AX TOS

  3. XXH XXH 1055H 1055H XXH 1056H 1056H 34H 1057H 1057H 12H 1058H XXH XXH BX BX XXXXH 1234H POP BX After execution Before execution XXH XXH XXH TOS 34H 12H 1058H XXH TOS XXH

  4. I/O address space FFFFH A separate 64 Kbyte address space is provided where I/O interfaces are implemented. open Certain I/O instructions can only perform operations to I/O devices located in this I/O address space. 00FFH reserved 00F8H open 0000H

  5. Addressing modes of the 8086 / 8088 μP Register addressing mode MOV AX, BX MOV destination operand, source operand Before the execution After the execution AX XXXXH AX 1234H BX 1234H BX 1234H

  6. Coding in machine language mod 00 memory mode no displacement Byte 1 Byte 2 01 Memory mode, 8 bit displacement 10 Memory mode 16 bit displacement opcode R/M W reg D mod 11 Register mode no displacement Except when R/M =110, 16 bit displacement follows W=0 8 bit data w=1 16 bit data D=0 direction is from the register specified in byte 2 D= 1 direction is to the register specified in byte 2 Operation code

  7. MOD = 11 Effective address ( offset ) calculation R/M W=0 W=1 R/M MOD=00 MOD=01 MOD=10 000 AL AX 000 [BX]+[SI] [BX]+[SI]+D8 [BX]+[SI]+D16 001 CL CX 001 [BX]+[DI] [BX]+[DI]+D8 [BX]+[DI]+D16 010 DL DX 010 [BP]+[SI] [BP]+[SI]+D8 [BP]+[SI]+D16 011 BL BX 011 [BP]+[DI] [BP]+[DI]+D8 [BP]+[DI]+D16 100 AH SP 100 [SI] [SI]+D8 [SI]+D16 101 CH BP 101 [DI] [DI]+D8 [DI]+D16 110 DH SI 110 Direct address [BP]+D8 [BP]+D16 111 BH DI 111 [BX] [BX]+D8 [BX]+D16

  8. General Instruction Format Byte 1 Byte 2 Byte 3 Byte 4 Byte 5 Byte 6

  9. 10001000 11 000 011 8 8 c 3 H MOV BL,AL Register / memory to/ from register 100010dw Displ-hi Mod reg r/m Displ-lo Assembly code Machine code

  10. Immediate addressing mode MOV AL, 15H MOV destination operand, immediate source operand Immediate operand must begin with 0-9 MOV AL, 0A5H Before the execution After the execution AX XXXXH AX XXA5H

  11. 1011 w reg data Data if w=1 Immediate to register MOV AL, 15H 10110000 00010101 Assembly code Machine code B015H

  12. Register / memory to / from register 100010dw Mod reg r/m Disp-lo Disp-hi 10001011 00000110 00000100 00000000 8 b 0 6 04 00 Direct addressing mode The memory locations following the instruction op code hold an effective memory address MOV AX, [0004] The logical address is [DS] : [ 0004]

  13. μP IP 0000 CS 0100 0200 DS SS ES AX XXXX 01000 8B μP 01000 8B 06 01001 IP 0004 06 01001 01002 04 01002 04 CS 0100 01003 00 01003 00 0200 DS XX SS ES 02004 ED AX BEED 02004 ED BE 02005 02005 BE Before execution After execution MOV AX, [0004] Direct addressing mode

  14. Register indirect addressing mode MOV AX, [SI] The logical address is [DS] : [BX] or [DS] : [SI] or [DS] : [DI] 01000 01000 8B 8B μP μP IP IP 0000 0002 04 04 01001 01001 01002 01002 XX XX CS CS 0100 0100 01003 01003 XX XX 0200 0200 DS DS 03234 03234 ED ED SI SI 1234 1234 BE BE 03235 03235 AX AX XXXX BEED

  15. 10001011 00 000 100 8 B 0 4 H MOV AX, [SI] Register / memory to/ from register 100010dw Displ-hi Mod reg r/m Displ-lo Assembly code Machine code

  16. Indexed addressing mode Logical address = [ DS] : [SI] + direct or indirect displacement or [DS] : [DI] + direct or indirect displacement MOV AL,[SI]+1234H Register / memory to / from register 100010dw Mod reg r/m Disp-lo Disp-hi 10001010 10000100 00110100 00010010 8 A 8 4 34 12

  17. Based addressing mode Logical address = [ DS] : [BX] + direct or indirect displacement or [SS] : [BP] + direct or indirect displacement MOV [BX]+1234H,AL Register / memory to / from register 100010dw Mod reg r/m Disp-lo Disp-hi 10001000 10000111 00110100 00010010 8 8 8 7 34 12

  18. Based addressing mode MOV [BX]+1234H, AL 01000 88 μP IP 0000 87 01001 01002 34 CS 0100 01003 12 0200 DS 01000 8B μP 04234 XX SI 1234 IP 0004 04 01001 XX 04235 01002 XX BEED AX CS 0100 01003 XX BX 0200 DS 1000 04234 ED SI 1234 XX 04235 AX BEED

  19. 01000 8A μP IP 0004 84 01001 01002 34 CS 0100 01003 12 0200 DS SI 1234 BE 05234 AX XXBE Indexed addressing mode MOV AL,[SI]+1234H 01000 8A μP IP 0000 84 01001 01002 34 CS 0100 01003 12 0200 DS SI 2000 BE 05234 XXXX AX

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