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Power Quicc ( MC8536EEC ) Microprocessor. Presented By: Mohsin Abbas. Introduction…. 32 bit Microprocessor Communication processor exclusively used in networks.

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Power quicc mc8536eec microprocessor

Power Quicc(MC8536EEC)Microprocessor

Presented By: Mohsin Abbas


  • 32 bit Microprocessor

  • Communication processor exclusively used in networks.

  • designed to deliver gigahertz-class complex application processing performance with exceptional feature integration and high-speed connectivity for IP network and advanced media processing applications.

  • 784 pins……????????

  • Physical dimensions of 29 mm x 29mm


  • e500 core processor(36 bit physical addressing,3450

    Dhrystone -MIPS at 1.5 GHz).

  • Enhanced peripheral and interconnect technology

  • Clock speed 1.5Ghz

  • High speed connectivity

  • Advanced energy efficient modes

E 500
e 500

  • built on Power Architecture technology

  • 32 bit microcontroller.

  • A big enterprise in itself.

  • Having large number of registers of different types.

    General-Purpose Registers

    Special-Purpose Registers

    Machine State Register

    Condition Registers

  • 36 bit physical addressing.

L1 l2 cache
L1/L2 cache

  • L1 cache-32 KB data cache and 32 KB instruction cache.

    • instruction and data cachesto provide the execution units and registers rapid access to instructions and data.

    • Eight-way set associative, non-blocking caches

  • L2 cache-512 KB, 256/128/64/32 KB can be used as SRAM, L1 and L2 hardware coherency, I/O transactions can be stashed into L2 cache regions.

Power management
Power management

  • Power management is done by

  • using the following pins shown in

  • the diagram in CCB signals i.e

  • complex core signals.

    • Nap

    • Doze

    • sleep

    • jog

    • packet lossless deep sleep

Ddr2 ddr3 sdram

  • DDR2/DDR3 SDRAM memory controller with full ECC support

    – One 64-bit/32-bit data bus

    – Up to 333-MHz clock (667-MHz datarate)

    – Supporting up to 16 Gbytes of main memory

    – Using ECC, detects and corrects all single-bit errors

    and detects all double-bit errors and all errors within

    a nibble.

    – Invoke a level of system power management

    by asserting MCKE SDRAM signal on-the-fly to

    put the memory into a low-power sleep mode

    – Both hardware and software options to support

    battery-backed main memory

What else
What else?

  • Dual universal asynchronous receiver/transmitter (DUART) support.

  • It contains the programmable interrupt controller PIC.

  • Three PCI Express interfaces

    – PCI Express 1.0a compatible

    – One x8/x4/x2/x1 PCI Express interface

    – Two x4/x2/x1 ports, or,

    – One x4/x2/x1 port and Two x2/x1 ports

  • PCI 2.2 compatible PCI controller

  • High speed serdes interface.

    The MPC8536E features two Serializer/Deserializer (SerDes) interfaces to be used for high-speed serial interconnect applications. The SerDes1 interface is dedicated for PCI Express data transfers. The SerDes2 can be used for SGMII or SATA.


  • Three universal serial bus (USB) dual-role controllers comply with USB specification revision 2.0

  • 133-MHz, 32-bit, enhanced local bus (eLBC) with memory controller

  • Two enhanced three-speed Ethernet controllers (eTSECs) with SGMII support

    – Three-speed support (10/100/1000 Mbps)

    – Two IEEE Std 802.3™, IEEE 802.3u, IEEE 802.3x,

    IEEE 802.3z, IEEE 802.3ac, IEEE 802.3ab, and

    IEEE Std 1588™-compatible controllers.

  • 2 SATA, computer buses, is a storage-interface for connecting host bus adapter to mass storage device.

Comparison with hc11
Comparison with Hc11

  • Clock speed

  • Address lines

  • Have high peripheral connectivity speed

  • Diversity in serial communication, that is, more than one way to do serial communication

  • Cache’s

  • Power management

  • On chip network, that is, ethernet controllers

  • Enhanced capability of Error correction techniques