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Meeting the Design Challenges of Nano-CMOS Electronics: Introduction to an EPSRC Pilot Project

Meeting the Design Challenges of Nano-CMOS Electronics: Introduction to an EPSRC Pilot Project. Professor Richard O. Sinnott Technical Director National e-Science Centre University of Glasgow. University Partners. Advanced Processor Technologies Group ( Prof S. Furber )

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Meeting the Design Challenges of Nano-CMOS Electronics: Introduction to an EPSRC Pilot Project

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  1. Meeting the Design Challenges of Nano-CMOS Electronics: Introduction to an EPSRC Pilot Project Professor Richard O. Sinnott Technical Director National e-Science Centre University of Glasgow

  2. University Partners Advanced Processor Technologies Group (ProfS. Furber) Device Modelling Group (PI Prof A. Asenov) Electronic Systems Design Group (Prof M. Zwolinksi) Intelligent Systems Group (Prof. A. Tyrrell) National e-Science Centre Glasgow (Prof R. Sinnott) Microsystems Technology Group (Prof. D. Cumming) Mixed-Mode Design Group in IMNS (Prof. A. Murray) National e-Science Centre Edinburgh (Dr D. Berry) e-Science NorthWest Centre (Dr S. Pickles)

  3. Industrial Partners Global EDS vendor and world TCAD leader 600 licences of grid implementation, model implementation UK fabless design company and world microprocessor leader Core IP, simulation tools, staff time Real businesses/users with clear demands on Grid UK fabless design company and world mixed mode leader Additional PhD studentship for mixed mode design Global semiconductor player with strong UK presence Access to technology, device data, processing Global semiconductor player with strong UK presence Access to technology, device data, processing Global semiconductor player with UK presence CASE studentship, interconnects Trade association of the microelectronics industry in the UK Recruiting new industrial partners and dissemination

  4. The Challenge Toshiba 04 Device diversification 90nm: HP, LOP, LSTP 45nm: UTB SOI 32nm: Double gate

  5. Vout2 [V] Vout1 [V] The Challenge trapping of a single electron in the channel region of a device can alter its drive current by more than 15% Geometry variation Strain variation Device Circuit Strain OPC malfunctioning variability Layout induced variability Technology - design link Atomistic variability Statistical and novel design

  6. Timeliness “The industry needs to deliver a new generation of chip design-tools to ease power and variance problems, according to Intel’s chief technology officer.” “Develop radical new design methods and tools for systems with over 100 billion nano-devices exhibiting new characteristics and variability, while reaching the objectives of low power consumption, reliability, evolvability and affordable design efforts.” Thematic Group 2 Nanoelectronics and Nanotechnologies EC Public Consultation 3 Feb 2006

  7. Delivering new results Simple concept Integrated Hierarchical Statistical Design Complex data and workflows Data and Compute Intensive Security Sensitive

  8. The Development Challenge Electronic design teams currently use different tools, have different data formats, need access to large scale compute resources, generate vast amounts of data, work independently of device engineers. We propose to build an integrated Grid infrastructure which will .... …da-da-daaah… …revolutionise nanoCMOS design by making it a completely integrated collaborative process.

  9. Grid service development Meta-data capture/data annotation myGrid workflow => Typical existing application Balsa high-level asynch. circuit synthesis tool used, e.g. for timing verification Expressivity of myGrid Taverna, FreeFluo for this domain? Control loops for optimisation, concurrency needed Feed requirements into OMII-UK for language and enactment engine enhancements

  10. Will focus on 4 key areas – all targeted toreal scientific needs: Workflows Data mgt Security Resource mgt • Workflows are fundamental to the way scientists want to work • tighter dependencies between services (e.g. coupled simulations) • Generating huge amounts of data in many different formats • establishing metadata formats for a new industry • Advanced security crucial to engage with industry • introducing advanced security to the OMII-UK architecture; allowing for the effect of licensing in managing workflow • Extremely computational intense, they need intelligent job scheduling/mgt • linking OMII-UK services to batch-oriented codes; a marriage of the HPC-oriented Grid world and the user targeted service oriented architecture world Feed requirements to, and shape the future implementation of OMII-UK • e-Science partners directly involved in OMII-UK • Pickles, Berry on OMII-UK Technical Advisory Board • Sinnott in OMII User Group

  11. Workflow Mgt Framework Data Mgt Framework Workflow Definition Domain Knowledge Capture/Pres. Robust Enactment Data Access/Linkage/Integration Dependency Mgt Data Transformation Job submission/mgt Replication/Movement Computational Steering Metadata/Provenance Visualisation Services Storage/Curation Services Resource Mgt Framework Advanced Security Framework Accounting Components Trust Federation Information Services Identity Management Resource Broking Service Security attributes definition Meta-scheduling Services Policy Decision/Enforcement Points Reservation/Allocation Services Attribute Request/Release Policies Grid stretch focused on realising scientific needs Optimised nanoCMOS Grid Infrastructure

  12. 0. Auth/AuthZ GLA researcher 3b Taurus 1. security attr. request/release 3c * inputs * outputs 3a Aurora 3d * inputs * outputs 3e Grid Service w. License needed 6a SPICE 4c * inputs * outputs 2a 4b 5b 2b 5 (data movement/mgt) Representative Scenario Workflow for 90nm MOSFET using Taurus with specific dopant concentration generating I-V curves to be fed into Aurora parameter extraction tool which will generate SPICE input files, Which, when simulated, will drive a visualisation application GLASGOW PDP DevSim Portal SPICE workflow Service registry 4a PDP Enactment engine MANCHESTER 5a Aurora Meta-Scheduler Planning Service Taurus SPICE Design Catalogue (workflows) / Data Sets EDINBURGH PDP Taurus 6b PDP

  13. Why Shibboleth…? • Can solve licensing issues on Grid • 451 group identified this as key area Grid community must address (…IECnet) • Fine grained authorisation readily supported by Shibboleth and associated technologies such as PERMIS • Is being deployed across UK academia to replace existing Athens system • essential to address gap between research and Grid communities • consider number of active UK e-Science certs vs Athens accounts • Future Grids must be harmonised with wider e-Infrastructure developments • Using the Grid should be no different than using any other internet based system from researcher perspective

  14. Glasgow SoA using Edinburgh DIS DyVOSE Delegation Issuing Service Glasgow Edinburgh Condor pool Create new ACs for Glasgow nanoCMOS users/roles LDAP LDAP Glasgow Education VO policies Edinburgh Education VO policies Glasgow nanoCMOS policies Edinburgh nanoCMOS policies shameless plug for demo at NeSC stall... PERMIS based Authorisation checks/decisions Job scheduling/ data management Grid BLAST Service Grid BLAST Data Service Edinburgh nanoCMOS services Glasgow nanoCMOS services Edinburgh nanoCMOS data sets Nucleotide + Protein Sequence DB Implemented by Students data input Protein/nucleotide sequence data returned based on student team and Edinburgh policy Glasgow nanoCMOS researchers Grid-data Client

  15. Shibboleth-based access to/usage of Grid Resources Roles, attributes, licenses,… needed to make authorisation decision Distinguished Name

  16. Upperware Lowerware + OMII-UK & NGSLife Sciences Gateway Taken from Dr S. Newhouse presentation to UK e-Science Directors on OMII-UK plans 08/03/2006 nanoCMOS • Talk to us about other ‘gateways’ • Computational Chemistry • Engineering • Image Analysis • … Bioinformatics & Life Science Users nanoCMOS Users Middleware Taverna SOAPLab Services GRIMOIRES OMII: e-Infrastructure Services Core NGS Middleware OGSA-DAI GridSAM Hardware Resources

  17. Questions?

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