Functional & AC Testing

Functional & AC Testing • Test Frequency • Pin • Level • Timings & Signal formats • Vector

與開發程式有關的item • VDD min/max • VIL/VIH • VOL/VOH • IOL/IOH • Test Frequency • Input signal timings • Input signal formats • Out put timings • Vector sequencing

Input data • Test vector data • instructions or stimuli to the DUT • Input signal timing • signal transition points • Input signal formats • wave shapes • Input levels • VIL/VIH • Time set selections • if more than one time set is used

Output data • Test vector data • expected logic states from the DUT • Output strobe timing • when to sample outputs within the test cycle • VOL/VOH • expected output levels from DUT • IOL/IOH • output current loading • Time set selections • if more than one time set is used

Testing output

Vector data

Functional testing

Executing a Functional test • Define VDD level • Define input and output levels • Define output current loading • Define test cycle time • Define input timings and formats for all input pins • Define output strobe timings for all output pins • Define start and stop locations for vector memory • Execute the test

Relaxed parameters • VIL↓、VIH↑ • VOL=VOH=1.5v • Period↑(Freq↓) • setup & hold time↑ • output propagation delay↑

VIL/VIH test • VIL=0.1*VDD， VIH=0.9*VDD

VOL/IOL VOH/IOH test • VOL=0.4*VDD，VOH=0.6*VDD

Functional IOZ

Functional & AC Testing