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Balsa – Description to Layout

Balsa – Description to Layout. A Hands-on Tutorial Session Doug Edwards & Andrew Bardsley. Other Balsa Tutorials. Async 2000 (Eilat) concentrated on language aspects small design examples Xilinx implementation of calculator ACiD summer school, July 2002

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Balsa – Description to Layout

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  1. Balsa – Description to Layout A Hands-on Tutorial Session Doug Edwards & Andrew Bardsley

  2. Other Balsa Tutorials • Async 2000 (Eilat) • concentrated on language aspects • small design examples • Xilinx implementation of calculator • ACiD summer school, July 2002 • probably in-depth use of language for design examples • buy the book - ISBN 0-792-37613-7

  3. Aims of Async 2002 Tutorial • To explore parts of the system not demonstrated previously • GUI front-end • balsa-mgr • back-end alternatives • “how do I produce silicon”? • “what are the trade-offs”? • To gain some exposure to the language • but, language learning by osmosis!

  4. Session Schedule • Brief overview of the Balsa system • Language introduction • hands-on examples • To synthesise the original Manchester Small-Scale Experimental Machine • experiment with different back-ends A replica of the original SSEM is on display at the conference dinner

  5. Session Schedule • Coffee Break • Advanced Design • Spamulet0 – write your own ARM-like processor description

  6. Andrew Bardsley Chief Architect/Implementer The Balsa Team Doug Edwards Team Leader Luis Plana Dual Rail Back-end Lilian Janin balsa-mgr/LARD Will Toms 1-of-4 Back-end

  7. Balsa Requirements • Freely available • ftp://ftp.cs.man.ac.uk/pub/amulet/balsa/ • not all back-ends available • OS requirements: • Linux • Sun Solaris 7-8 • MacOS X (+ X11R6 …)

  8. Front End

  9. Compass DA Route

  10. xilinx route

  11. top level relies on powerview

  12. Cadence route

  13. Other Balsa Work • Burst-mode resynthesis • Tibi Chelcea & Steve Nowick • Faster LARD simulation • Lilian Janin (x50 speed up) • Datapath compilation optimisation • Andrew Bardsley • Complete Amulet implementation • Peter Riocreux et al.

  14. Proven Balsa Synthesis- DMA Controller for DRACO Balsa Synthesised DMA Controller

  15. DMA Controller Layout

  16. What is Balsa? • Language for synthesising large async circuits & systems • CSP/OCCAM background • Tangram-like • based on Tangram compilation function • compiles to a small, parameterisable, set of handshake components • origins: ESPRIT 6143 EXACT project

  17. Handshake circuits – 1 • Components communicate along handshake channels • Channels connect to ports on components • Ports have: • Type • Direction • Sense

  18. Handshake Circuits – 2 • Port type determines the number of data wires • no data wires == control only port! • Port direction is input, output or control only (called sync) • Port sense • Active: initiate transfers (source the req) • Passive: respond to requests (… the ack)

  19. Balsa Language Features • Data types based on sequence of bits • Arrays and records are bit-based • Element extraction is by array slicing • Strict data typing • Structural iteration • Arrayed channels • Parameterised, recursively expanded procedures

  20. Balsa Language Features • Enclosed selection semantics • Allows passive ported circuits • Allows push (micropipeline-style) circuits • Allows unbuffered (latch-free) circuits

  21. Example: Single Place Buffer import [balsa.types.basic] type word is 16 bits procedure buffer (input i : word; output o : word) is variable x : word begin loop i -> x ; -- Input communication o <- x -- Output communication end end

  22. Example: Single Place Buffer import [balsa.types.basic] type word is 16 bits procedure buffer (input i : word; output o : word) is variable x : word begin loop i -> x ; -- Input communication o <- x -- Output communication end end library mechanism type declaration channel declarations procedure definition implies latch repeat forever read input channel into local variable x sequential operation output local variable x to output channel

  23. Buffer Handshake Circuit Single-place buffer repeater  activation channel # sequencer ; transferrer i o x T T variable

  24. Buffer Handshake Circuit Single-place buffer Repeater is activated  # ; i o x T T

  25. Buffer Handshake Circuit Single-place buffer Sequencer handshakes to left transferrer  # ; i o x T T

  26. Buffer Handshake Circuit Single-place buffer Transferrer requests data from environment  # ; i o x T T

  27. Buffer Handshake Circuit Single-place buffer Data transferred to variable x  # ; i o x T T

  28. Buffer Handshake Circuit Single-place buffer Variablehandshake completes  # ; i o x T T

  29. Buffer Handshake Circuit Single-place buffer Transferrerhandshake completes to environment  # ; i o x T T

  30. Buffer Handshake Circuit Single-place buffer Transferrerhandshake completes  # ; i o x T T

  31. Buffer Handshake Circuit Single-place buffer Sequencer handshakes to right transferrer  # ; i o x T T

  32. Buffer Handshake Circuit Single-place buffer Transferrer reads variable  # ; i o x T T

  33. Buffer Handshake Circuit Single-place buffer Transferrer outputs to environment  # ; i o x T T

  34. Buffer Handshake Circuit Single-place buffer Sequencer initiated handshakes complete  # ; i o x T T

  35. Buffer Handshake Circuit Single-place buffer Sequencer completes its activation handshake  # ; i o x T T

  36. Buffer Handshake Circuit Single-place buffer Repeater initiates another transfer, repeat  # ; i o x T T

  37. a b a a b a r r Example Handshake Component • Handshake definition of repeater (Loop) Loop(a,b) = (a: #[b]) = (a: #[b;b]) = (ar: #[br ; ba ; br ; ba])

  38. Example Handshake Component • Case component (single-rail) 1 hot encoding data “n” bits wide true/complement lines: dual-rail expansion

  39. Compilation Tools • balsa-c • compiles Balsa programs to Breeze • includes other Breeze definition files • Breeze is a handshake -circuit netlist format • acts as a library format for within Balsa • balsa-netlist • produces an appropriate netlist from a compiled Balsa program • technology specific options

  40. Simulation Tools • breeze2lard • produces a LARD simulation file • various LARD utilities • mainly hidden within the Makefile by balsa-md

  41. Utilitity Tools • breeze2ps • creates a PostScript HC graph • breeze-cost • enumerates the handshake circuits used and gives an approximate area cost • balsa-md • automatic Makefile maker • balsa-mgr • GUI interface to balsa-md

  42. Exercise: Single Stage Shift Register Objective: introduction to balsa-mgr • cd ~/Balsa/shift-reg • balsa-mgr & • create new project: Project -> New • add SRA1.balsa to project

  43. Creating a Project create new project

  44. Set Project Name set name

  45. Adding Files Add Files

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