Lecture 6 Coffee Vending Machine using FPGA

1. Lecture 6 Coffee Vending Machine using FPGA 2007/10/12 Prof. C.M. Kyung

2. Vending Machine Design Using FPGA • 1. GOAL is ~ • (1) Understanding of FSM and Its Sequential Behaviors • (2) Understanding of the Design Procedure for FSM • (3) Design of the FSM for Vending Machine and Implementation

3. Vending Machine Design Using FPGA • 2. Moore machine and Mealy machine Moore Machine Outputs are function solely of the current state Outputs change synchronously with state changes Mealy Machine Outputs depend on state AND inputs Input change causes an immediate output change Asynchronous signals

4. Vending Machine Design Using FPGA • 2. FSM Design Procedure • Step1 : Understand the statement of specification • Step2 : Obtain an abstract specification of the FSM • Step3 : Perform state minimization • Step4 : Perform state assignment • Step5 : Choose FF types for implementing the FSM’s state • Step 6: Implement the finite state machine

5. Vending Machine Design Using FPGA • 3. Design Procedure for State Machines • (1) Description of SM - State diagram, SM chart, … • (2) State Optimization • - Elimination of redundant states, … • (3) State Encoding • - Gray, One-hot, Thermometer, … • (4) Logic Minimization • - K-MAP, Quine-Mckluskey Method, … In modern design flows, these are usually done easily with CAD tools

6. Vending Machine Design Using FPGA • 4. State Machine Design • (1) State Graph, State Table

7. Vending Machine Design Using FPGA • 4. State Machine Design • (2) No state machine optimization • (3) State encoding

8. Vending Machine Design Using FPGA • 4. State Machine Design • (4) Result of Logic Minimization

9. Vending Machine Design Using FPGA • 5. Practical Design of FSM • (1) In good design, data path and control path are clearly separated

10. Vending Machine Design Using FPGA • (2) Example description of FSM in Verilog HDL

11. Vending Machine Design Using FPGA • (3) Timing Constraints for Sequential Logics • - Set-up time (Tsu) • Input should be “set-up” early enough before the clocking event. • - Hold time (Th) • Input should be “held” at least some time after the clocking event.

12. Vending Machine Design Using FPGA • (4) Synchronizations of External Inputs - Bouncing • - In mechanical switching, any two metal contacts generate multiple • signals as the contacts close or open. - This should be prohibited for properly working in the digital logic circuits.

13. Vending Machine Design Using FPGA • (5) De-bouncing Technique • - RC De-bouncer • - Flip-Flop Based De-bouncer • - Software Based De-bouncer switch signal CLK

14. Vending Machine Design Using FPGA • 6. Problem statement • (1) Vending Machine System - 사용하는 동전은 50원 / 100원 • - 판매하는 커피는 두 종류이고 가격은 각각 100원 / 200원 • - 자판기가 받아들일 수 있는 금액은 최대 300원 • - 반환 버튼을 누르면 그 때까지 투입된 동전은 모두 반환

15. Vending Machine Design Using FPGA • 6. Problem statement • - LED 를 이용한 출력신호의 확인

16. Vending Machine Design Using FPGA • 7. Experiment Requirements • (1) Equipment - Breadboard- KeyLocker Machine- DC Power Supply • (2) Component • - Switch • (3) TTL IC’s • - 7400 (2 input NAND gate) • - 7404 (Inverter) • - 7408 (2 input AND gate) • - 7410 (3 input NAND gate) • - 74LS73 ( Dual J-K flip-flop ) • - 74LS74 ( Dual D-Type flip-flop )

17. Vending Machine Design Using FPGA • 8. References • (1) Textbook • - Contemporary Logic Design - Katz • - Fundamentals of Logic Design - Roth • (2) 6st Week T.A. E-mail • sckid@eeinfo.kaist.ac.krthkim@icslab.kaist.ac.kr • hsjeon@icslab.kaist.ac.kr • (3) Lecture Homepage • http://wink.kaist.ac.kr/course/ee306/