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Analog Electronics Class 3 Vosi, Vois Drift, Ib, Ib Drift, Ibos

Analog Electronics Class 3 Vosi, Vois Drift, Ib, Ib Drift, Ibos. Sep 20, 2011. Statistics Review. Gaussian (or Normal) Distribution. 68% within ± 1 standard deviation 99.7% within ± 3 standard deviations. Single Ended Limit. A typical MIN and MAX range is at least +/-3 σ :

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Analog Electronics Class 3 Vosi, Vois Drift, Ib, Ib Drift, Ibos

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  1. Analog Electronics Class 3Vosi, Vois Drift, Ib, Ib Drift, Ibos Sep 20, 2011

  2. Statistics Review

  3. Gaussian (or Normal) Distribution 68% within ±1 standard deviation 99.7% within ±3 standard deviations

  4. Single Ended Limit A typical MIN and MAX range is at least +/-3σ: Mean = Typical MAX = Mean + 3σ (or greater) MIN = Mean - 3σ (or greater)

  5. Double Ended Limit Symmetrical Limits: Max = 150uV is +/-150uV Mean = often approximately zero Typical = Mean + σ ≈ σ Max = + 3σ (or greater) Min = - 3σ (or smaller)

  6. Yield – Percentage of devices that Pass Test

  7. Yield – Multiple Tests Probability that two or more events occur P(A ∩ B ∩ C) = P(A) x P(B) x P(C) If we assume that we set all the limits to +/-3σ What is the probability that we see a failure for five (5) different tests: P = (0.997) (0.997) (0.997) (0.997) (0.997) = (0.997)5 = .985 98.5% or a 1.5% chance of failure. For a quad device (four times the number of parameters): P = = (0.997)20 = .941 94.1% or a 5.9% chance of failure

  8. Production Worthy Test Limits

  9. Transistor Review

  10. NPN Bipolar Transistor NPN Transistor – Current Controlled Device Ic = Ib x β Ie = Ib + Ic Vbe = +0.7V typical BVceo = Collector Emitter Breakdown voltage, base open BVebo = Emitter Base Breakdown Voltage Collector Open

  11. N-Channel Depletion Mode JFET N-Channel Depletion JFET Transistor – Voltage Controlled Device Vgs_off = Negative Voltage (no current) Vgs max = 0V (maximum current) Vp = Pinch off Voltage Which determines Triode Region (ohmic region) Vp < Vgs < 0V, Vds < Vgs - Vp Saturation Region (pinch-off region) Vp < Vgs < 0V, Vds > Vgs - Vp

  12. N-Channel Enhancement Mode MOSFET Don’t over voltage gate to source junction N-Channel JFET Transistor – Voltage Controlled Device Vgs_off = Negative Voltage (no current) Vgs max = 0V (maximum current) Vp = Pinch off Voltage Which determines

  13. LM741 Op-Amp Schematic

  14. Simplified Op-Amp

  15. Short Overview of Common Mode Voltage

  16. Short Overview Of Common Mode Voltage (Vcm) Vcm is the average voltage on the inputs of the op-amp. If the op-amp is closed loop the voltage is approximately the same on both inputs. More detail next class!

  17. Percent Error Calculation

  18. Two Definitions Common Def Measurement Def Note: The sign of the error tells you if your measured result is greater or less then expected. A common error is to ignore the sign or reverse the order of measured and Ideal.

  19. What is the error? Common Def Measurement Def

  20. Op Amp Power Supply

  21. IQ – Supply Current With No Load IQ No Load

  22. Data Sheet Specification Table The power supply current is typically 17uA, maximum 25uA at 25C with no load connected.

  23. Data Sheet Specification Table The power supply current is a maximum 28uA from -40C to 125C with no load connected.

  24. Absolute Maximum Ratings Exceeding maximum ratings will cause permanent damage to the device.

  25. Absolute Maximum Ratings

  26. Another Example OPA277 +/-15V is a 30V supply. If you exceed 36V you will damage the device. Also note the “operating range” specification of ±18V

  27. OPA333 OPA277

  28. Iq + Output Current IAM2 = Iq + Iout = 415uA + 5.05mA = 5.465mA

  29. Iq + Output Current (low Rf) IAM1 = Iq + Iout = 415uA + 10mA = 10.415mA

  30. Iq + Output Current (low Rf, No Load) IAM1 = Iq + Iout = 415uA + 5mA = 5.415mA

  31. Input Offset Voltage and Drift

  32. Input Offset

  33. OPA333 OPA333

  34. OPA827 OPA827

  35. How is Vos Defined, Simulate it!

  36. OPA835 OPA835 Drift Slope – Positive and Negative For this example Vos drift is defined:

  37. Drift Slope – Common Definition

  38. OPA827 Drift Slope – Positive and Negative(common definition) • Absolute value makes all results positive. • Actual drift may be positive or negative.

  39. OPA277 Warm Up Typical offset = 10uV Initial error is 10% of typical.

  40. Application Example What is the percentage error?

  41. Input Offset Drift Calculations

  42. Input Bias Current and Drift

  43. Simple Bipolar (No Ib Cancelation) Bias current in Bipolar amplifiers is from Base Current. It is typically larger then FET and it flows into the input terminals. Input offset current is the difference between the two currents. It is typically smaller then Ib for this simple configuration. Ibos = Ib1 – Ib2

  44. Bipolar with Ib Cancelation The input bias currents are mirrored and summed back in to cancel the bias current. This has the effect of significantly reducing input Ib. Note that when this is done, Ib can flow in both directions. Also Ibos is no longer smaller then Ib. Ibos = Ib1 – Ib2

  45. Bias current in MOSFET amplifiers is mainly from leakage into ESD diodes.

  46. OPA277 OPA333 CMOS Chopper amplifier: In this case the bias current is not strongly effected by temperature. Bipolar amplifier: In this case you see a dramatic increase in bias current at 75C

  47. OPA350 OPA333 CMOS amplifier: In this case you see a dramatic increase in bias current at 25C. Note the logarithmic graph. CMOS Chopper amplifier: Shows that Vcm has an effect on Ib.

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