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97-0834 Modification to Appendix A of Performance Baseline Text on MIMO Latency

97-0834 Modification to Appendix A of Performance Baseline Text on MIMO Latency. Gojko Babic, Raj Jain, Arjan Durresi, Justin Dolske The Ohio State University Contact: Jain@cse.ohio-state.edu http://www.cse.ohio-state.edu/~jain/. Overview. Motivation: Why MIMO? Zero Delay Switch

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97-0834 Modification to Appendix A of Performance Baseline Text on MIMO Latency

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  1. 97-0834Modification to Appendix A of Performance Baseline Text on MIMO Latency Gojko Babic, Raj Jain, Arjan Durresi, Justin Dolske The Ohio State UniversityContact: Jain@cse.ohio-state.edu http://www.cse.ohio-state.edu/~jain/

  2. Overview • Motivation: Why MIMO? • Zero Delay Switch • MIMO Latency Definition • Examples • MIMO Measurements • User Perceived Delay

  3. time time bit in t t bit in bit out in in Latency t t out out bit out Single Bit Latency • Non-Zero Delay Switch: • Zero Delay Switch:

  4. Usual Frame Latencies Metrics First bit of the frame enters Frame input time FIFO FILO Last bit of the frame enters LIFO First bit exits LILO Frame output time Last bit of the frame exits

  5. First bit of the frame enters FIFO Frame input time FILO First bit exits Last bit of the frame enters Frame output time LILO Last bit of the frame exits LIFO • In cut-through switches LIFO latency can be negative

  6. FIFO • FIFO latency may be small but the later cells may delayed considerably First bit enters Frame input time FIFO Last bit enters First bit exits Frame output time LILO Gap Cell Last bit exits

  7. First bit of cell enters First bit of cell exits Cell input time Cell output time time Last bit of cell enters Last bit of cell exits Zero-Delay Switch I • Input Rate = Output Rate • A fiber of length k km has a latency of 5*k ms. • Fiber of zero length has zero latency.

  8. First bit enters First bit exits Cell input time Last bit enters Cell output time Last bit exits Zero-Delay Switch II • Input Link Rate > Output Link Rate • Need to buffer input.

  9. First bit enters First bit exits Cell input time Cell output time Last bit enters Last bit exits Zero-Delay Switch III • Input Link Rate < Output Link Rate • The zero-delay switch is intelligent to avoid underruns

  10. MIMO Latency Definition • MIMO Latency = FILO Latency - NFOT • FILO latency = Time between the first bit entry and the last bit exit • NFOT = Nominal Frame Output Time: the time a frame needs to pass through the zero-delay switch, calculated as:Initially NFOT = 0 and time t is measured from the arrival of the first bit of the first cell. For each cell with its first bit arriving at time t NFOT = max{t, NFOT} + CT. • CT = Max{cell input, cell output time}

  11. time First bit of cell arrives First bit of cell transmitted 0 1 2 3 4 First bit of cell transmitted First bit of cell arrives 5 6 7 8 9 Example 1 • Input rate > Output rate • CT = Cell Output Time = 4 • 2nd cell at 5: NFOT = max{5, 4} + 4 = 9

  12. First bit of cell arrives time First bit of cell transmitted 0 1 2 First bit of cell arrives 3 First bit of cell transmitted 4 5 6 7 8 9 Example 2 • Input rate > Output rate • CT = Max{1, 4} = 4 • 2nd Cell arrival at 2: NFOT = max {2, 4} + 4 = 8

  13. time First bit of cell arrives 0 1 2 First bit of cell transmitted 3 4 First bit of cell arrives 5 6 7 First bit of cell transmitted 8 9 10 Example 3 • Input rate < Output rate

  14. Equivalent MIMO Latency Definition • When Input Link Rate < Output Link Rate: • CIT > COT • NFOT = Frame Input Time • MIMO = FILO Latency - NFOT = FILO Latency - Frame Input Time = LILO FILO - NFOT, if Input rate > Output rateLILO, otherwise MIMO =

  15. Practical MIMO Measurements • Contemporary ATM Monitors provide measurements data at the cell level: - Cell Transfer Delay CTD) - Cell Inter-Arrival Time • From the next slide: FILO = First Cell Transfer Delay + + First Cell to Last Cell inter-arrival time • Then, calculate NFOT and obtain MIMO as: MIMO = FILO - NFOT

  16. time a FILO = a+b b Practical MIMO Measurements (Cont.) a = First Cell Transfer Delay b = First Cell to Last Cell inter-arrival time

  17. CIT MIMO Practical MIMO Measurements(Cont.) • If Input Link Rate < Output Link Rate: • MIMO= LILO = Last cell’s Transfer Delay -CIT time Last cell’s Transfer Delay

  18. User Perceived Delay • The user starts waiting as soon as the first bit starts entering the system until the last bit exits the network. • So, user perceived performance is reflected by FILO Latency • MIMO latency measures only the switch’s contribution to the delay

  19. User Perceived Delay (Cont) 51 Mbps 155 Mbps 155 Mbps Switch Switch MIMO MIMO MIMO FILO FILO a. Input Link Rate is equal to Output Link Rate b. Input Link Rate is greater than Output Link Rate

  20. Summary • Usual frame latencies are not appropriate for ATM systems. • User perceive FILO latency as network delay • MIMO measures the switch component of FILO • MIMO Latency can easily measured using contemporary ATM monitors.

  21. Motion • Adopt the text under heading “Modifications to Appendix A of Performance Testing Baseline Text on MIMO latency” of 97-0834 to replace Appendix A of Performance Testing Baseline Text.

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