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Four-Bit Adder- Subtractor

Four-Bit Adder- Subtractor. Four-Bit Adder- Subtractor. (4 bit ripple adder). Four-Bit Adder- Subtractor. (4-bit carry- lookahead adder). Phase 1. Build it on breadboard Time: Tuesday ( 2/19/12,Tues), 1-3:45 pm Must demo your FPGA to Chio to receive credit. Phase 2.

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Four-Bit Adder- Subtractor

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  1. Four-Bit Adder-Subtractor

  2. Four-Bit Adder-Subtractor (4 bit ripple adder)

  3. Four-Bit Adder-Subtractor (4-bit carry-lookahead adder)

  4. Phase 1 • Build it on breadboard • Time: Tuesday (2/19/12,Tues), 1-3:45 pm • Must demo your FPGA to Chio to receive credit.

  5. Phase 2 • Model the4 bit adder-subtractor using FPGA • Time: (2/20/12,Wed), 1-2:15 pm • Must demo your board to Chio to receive credit. • Please also submit a printout of the Verilog code. Please do not plagiarize.

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