A PCI Card for Readout in High Energy Physics Experiments

1. A PCI Card for Readout in High Energy Physics Experiments Michele Floris1,2, Gianluca Usai1,2, Davide Marras2, André David3 1) Dipartimento di Fisica, Università degli studi di Cagliari, Italy. 2) INFN, Sezione di Cagliari, Italy. 3) CERN, Geneva, Switzerland 2003 IEEE Nuclear Science Symposium – October 19 -25 Portland, Oregon, USA

2. Outline • Motivations and requirements • Implementation • Applications • NA60 DAQ • Muon Spectrometer • Quartz fiber Zero Degree Calorimeter • Silicon strip Beam Tracker • Silicon pixel Vertex Telescope • Alice Muon tracking chambers test system F L E X I B I L I T Y 2003 IEEE NSS, Portland, Oregon, USA

3. MUON SPECTROMETER Dipole field2.5 T ~1m Tracking MWPCs Fe wall TARGET AREA Muon filter Toroidal Magnet TARGET BOX MUON FILTER BEAM BEAMTRACKER TELESCOPE IC ZDC and Quartz Blade Trigger hodoscopes Motivation & design requirements • NA60 Experiment DAQ • Fast development • NA60 is a running experiment • Flexibility • Readout of 4 different detectors • Partitions 2003 IEEE NSS, Portland, Oregon, USA

4. PCI Card NA60 DAQ scheme DAQ PC DET MEZZANINE burst burst interburst events - trigger NA60 readout system • PCI based system: • Good performances / low cost • Readout of several different detectors • General purpose PCI readout card • Detector specific mezzanine • NA60 readout is spill-buffered • DAQ handshake with readout system 2003 IEEE NSS, Portland, Oregon, USA

5. The PCI-CFD • Altera EP20K100, • BGA package • flexibility • reliability 1-Wire Unique ID 64 MB SDRAM Tristate buffer (JTAG input) ~ 2 months from the first schematic to a working prototype PMC connectors (not fully compliant IEEE 1386.1) • PLX 9030 (PCI Target) • Fast development • Bandwidth: 30 MB/s PLX EEPROM 2003 IEEE NSS, Portland, Oregon, USA

6. SDRAM RAM CTRL USER APPL. REGs MEZZANINE PCI interface PLX 9030 PCI-CFD Only these blocks change between different applications CTRL 2003 IEEE NSS, Portland, Oregon, USA

7. JTAG Configuration MEZZANINE The PLX has some general purpose I/O, we used them to implement a JTAG interface The JTAG chain can be extended to the mezzanine, using a jumper CONN EPROM FPGA PLX A tristate buffer is used to multiplex JTAG inputs CFD and mezzanine FPGAs can be JTAG programmed via PCI bus TRISTATE 2003 IEEE NSS, Portland, Oregon, USA

8. Software • Linux software has been developed • PLX Eeprom programming • PCI JTAG configuration • Driver • Sample code • PCI memory is seen as an “extension” of main memory! Interfacing with (DAQ) software is extremely easy! open (/dev/cfdX, “O_RDWR”); mmap (... ... , “REGISTERS/MEMORY”); memcpy (in, out, size); 2003 IEEE NSS, Portland, Oregon, USA

9. trigger start_read encode dflag data end_of_read NA60 VME-like/FERA interfaces • Very simple mezzanine • Level conversion ECL/NIM => TTL • Protocol itself implemented in PCI Card FPGA • R/O of 3 detectors implemented • 2 different protocols (RMH/FERA) BURST BUSY TRIGGER Protocol control signals & data PCI Card 2003 IEEE NSS, Portland, Oregon, USA

10. PCI-CFD NA60 Pixel readout • Pixel detector • Almost 800k channels • Several configurable parameters • Complex mezzanine • Readout control – zero suppression (FPGA) • Temporary data storage (FIFOs) See also N16-5 at this conference GOL chip hybrid withassemblies F I F o PILOT chip

11. NA60 Pixel readout – cont’d • Serial link PCI-CFD => mez. • Detector & electronics configuration 101101110010 Command register FIFO Start register Output register 2003 IEEE NSS, Portland, Oregon, USA

12. Alice Test system • 1 fully equipped slat chamber readout • AD DSP emulation in FPGA • Custom DAQ software See also N26-35 at this conference 2003 IEEE NSS, Portland, Oregon, USA

13. Conclusions • PCI bus offers very attractive features • High Performances • Low cost • Easy interfacing with SW • Using hardware cores PCI cards can be developed with little effort • Flexibility: • FPGA • Mezzanines • Several different applications: • VME-like, FERA interfaces • Custom applications: pixel readout, DSP emulation 2003 IEEE NSS, Portland, Oregon, USA