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The CMU Reconfigurable Computing Project. April 9, 1999 Mihai Budiu mihaib@cs.cmu.edu. Current Project Members. ECE Department Herman Schmit Srihari Cadambi Matt Moe Robert Taylor Ronald Laufer. CS Department Seth Copen Goldstein Mihai Budiu. Why Study Reconfigurable Hardware?.

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the cmu reconfigurable computing project

The CMU Reconfigurable Computing Project

April 9, 1999

Mihai Budiu

mihaib@cs.cmu.edu

CMU Reconfigurable Computing

current project members
Current Project Members

ECE Department

Herman Schmit

Srihari Cadambi

Matt Moe

Robert Taylor

Ronald Laufer

CS Department

Seth Copen Goldstein

Mihai Budiu

CMU Reconfigurable Computing

why study reconfigurable hardware
Why Study Reconfigurable Hardware?

It is a nice computation paradigm

(wire your own computer)

CMU Reconfigurable Computing

slide4

Why Study Reconfigurable Hardware

CMU Reconfigurable Computing

commercial players
Commercial Players

Source: In-stat April 1998 

*Does not include software, hardwire or support EPROMs

CMU Reconfigurable Computing

slide6

What Is “Reconfigurable Hardware?”

Interconnection

network

Universal gates

and/or

storage elements

Switches

CMU Reconfigurable Computing

basic ingredient ram cell

0

0

0

1

a0

data

a0

a1 & a2

a1

a1

Universal gate = RAM

Basic Ingredient:RAM cell

CMU Reconfigurable Computing

slide8

Basic Ingredients (ctd)

0

1

1

1

A switch is controlled by a 1-bit RAM cell

CMU Reconfigurable Computing

outline
Outline
  • What is reconfigurable hardware
  • RH vs other computation paradigms
  • Challenges in RH research
  • PipeRench: the CMU project:
    • the hardware
    • the software
  • Conclusions

CMU Reconfigurable Computing

rh vs asics
RH vs ASICs
  • Generally Application-Specific Integrated Circuits will be faster than RH:
    • RH wires are slow & big
    • RH bit-slices are costly to interconnect
    • RH devices must store configuration on the chip

but

  • RH can be reprogrammed
    • new algorithms
    • to fix bugs
  • RH cheaper in small production
  • RH tolerates faults better
  • RH sometimes faster with staged computation

CMU Reconfigurable Computing

rh vs microprocessors
RH vs Microprocessors
  • RH less flexible (like a VLIW with fixed instructions)

but

  • RH provides more (customized) computation elements
  • RH can decrease memory traffic
  • RH can be tailored for specific algorithms and data types

RH will not replace mP, but complement them

CMU Reconfigurable Computing

types of rh
Types of RH
  • FPGAs: bit-level logic functionality

(the basic processing elements compute on 1 bit)

  • word-based architectures: PipeRench (CMU)

(basic PE operates on 8 bits)

(basic PE is a small ALU)

  • coarse architectures: RAW (MIT)

(basic PE is a MIPS 2000 core)

CMU Reconfigurable Computing

rh in a system
RH In A System

CMU Reconfigurable Computing

challenges in rc
Challenges In RC
  • Software tools:
    • Programming RC like software development
    • Automatic compilation from HLL
    • Automatic program partitioning
  • Mapping efficiently algorithms (no ISA)
  • System issues
    • interfaces
    • find “ideal” RC fabric

CMU Reconfigurable Computing

the cmu reconfigurable computing project1
The CMU Reconfigurable Computing Project

CMU Reconfigurable Computing

hardware goals
Hardware Goals
  • To build a complete reconfigurable hardware device
  • To build the system integration hardware
  • To host the device in a PC

CMU Reconfigurable Computing

our device
Our Device:
  • Word processing elements
  • Pipelined architecture
  • Virtualized hardware
  • Local interconnection network
  • Wide pipelined bus

CMU Reconfigurable Computing

slide18

Configuration

memory

Data & Config

controller

Stripes

Processing

elements

CMU Reconfigurable Computing

hardware virtualization
Hardware Virtualization

Actual available

hardware

Instructions

currently in hardware

Program

Instructions paged out

CMU Reconfigurable Computing

hardware virtualization 2
Hardware Virtualization (2)

Page out

compute

compute

Program in

configuration

memory

compute

configure

Page in

hardware

Overlap configuration

with computation.

CMU Reconfigurable Computing

processing elements
Processing Elements

a

b

Cin

PE2

PE1

PE0

out

  • Look-up table
  • Any 3-to-1 function

CMU Reconfigurable Computing

the interconnection network

P*B bits

Word-level cross-bar

0

B bits

PE

PE 1

PE N

Pass Registers

P*B*N bits

The Interconnection Network

CMU Reconfigurable Computing

the pci board
The PCI Board

CMU Reconfigurable Computing

software goal
Software Goal

To program reconfigurable devices using the standard software development processes:

  • Compile C or Java
  • Do it quickly

Java

Partitioner

Data-flow Intermediate Language

DIL

Built

Configuration

CPU

Reconfigurable HW

CMU Reconfigurable Computing

slide25

Building Circuits From DIL

a = b+c*d;

e = c - d;

  • variables wires
  • operators gates

d

c

b

*

+

-

a

e

CMU Reconfigurable Computing

slide26

Mapping Circuits To

a

b

c

a

+

b

c

c

a

b

-

+

+

-

-

c

a

b

+

-

CMU Reconfigurable Computing

the dil compiler front end
The DIL Compiler Front-End

Circuit

Parser

Evaluator

Loader

Dil

input file

Backend

Loader

component

library

Component

circuits

CMU Reconfigurable Computing

the dil compiler backend
The DIL Compiler Backend

Circuit

(expanded)

Circuit

(placed)

Circuit

Optimizer

Placer-

Router

Front-end

The whole compilation process is very fast (compared to classical CAD tools).

We can compile two orders of magnitude faster.

Code generator

xfig

C++

C++

Asm

CMU Reconfigurable Computing

processing element size tradeoffs
Processing Element Size Tradeoffs

CMU Reconfigurable Computing

stripe width tradeoffs
Stripe Width Tradeoffs

CMU Reconfigurable Computing

bus width tradeoffs
Bus Width Tradeoffs

CMU Reconfigurable Computing

clock speed tradeoffs run time
Clock Speed Tradeoffs(run-time)

24

24

24

24

+

+

8

8

24

+

8

+

24

CMU Reconfigurable Computing

project status
Project Status
  • Operational:
    • Behavioral and structural models of Piperench in Verilog
    • Assembler, simulator
    • Tools for visualization and debugging
    • One tile fabricated and tested
    • Very fast compiler from intermediate language
  • In work:
    • Prototype PipeRench to be taped this summer
    • PCI board to host PipeRench in a PC

CMU Reconfigurable Computing

simulated speed up vs ultrasparc @ 300mhz
Simulated Speed-up vs. UltraSparc @ 300Mhz

CMU Reconfigurable Computing

future work
Future Work
  • Build the PCI board
  • Build the OS device drivers
  • Start investigating HLL issues:
    • automatic partitioning
    • translation to DIL
    • special code transformations

CMU Reconfigurable Computing

conclusions
Conclusions
  • A set of important applications can benefit from RC devices
  • RC offer potential for substantial performance improvement at a low cost
  • RC devices will soon be mainstreamin the embedded computing world; perhaps in the future they will also permeate the desktop

U

V

R

Pentium V

CMU Reconfigurable Computing