CSE 378 Computer Hardware Design - PowerPoint PPT Presentation

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CSE 378 Computer Hardware Design

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  1. CSE 378Computer Hardware Design • Prof. Richard E. Haskell • Email: haskell@oakland.edu • Tel: 248-370-2861 • Web site: www.cse.secs.oakland.edu/haskell • Follow CSE 378 -> CSE 378 link • Office Hours: • Tues. and Thurs., 4:00 - 5:00 p.m. • 115 Dodge Hall

  2. CSE 378 Computer Hardware Design • Lecture: 5:30 - 7:17 p.m., Tues., Thurs. • Room: 204 O’Dowd Hall • Lab: Tues. 12:00 - 3:00 p.m., or Tues. 7:30 - 10:30 p.m., or Thurs. 7:30 - 10:30 p.m. • Room: 133 SEB

  3. Course Goals • Learn to design digital systems using VHDL • Learn to synthesize VHDL designs to Xilinx Spartan 3 series FPGAs • Learn to use VHDL design tools: • Xilinx ISE • Aldec Active-HDL Simulator • Learn to design dedicated microcontrollers

  4. Course Objectives • Design combinational circuits using VHDL • Design sequential circuits using VHDL • Synthesize VHDL designs to Xilinx FPGAs • Simulate VHDL designs using Aldec Active-HDL • Design dedicated microcontrollers using VHDL and synthesize them to a Xilinx FPGA

  5. List of Topics • Digital Logic Basics • Combinational Logic Circuits & Design • Sequential Circuits • Registers and Counters • RAMs and ROMs • Xilinx FPGAs • Register Transfers and Datapaths • Sequencing and Control • Design of dedicated microprocessors

  6. Text and Materials • Required Text: Learning By Example Using VHDL – Advanced Digital Design by Richard E. Haskell and Darrin M. Hanna, 2007 (available of OU Bookstore). • Required : Spartan-3 board available from www.digilentinc.com Enter OU378 in the Value code field

  7. Labs • Weekly labs • Results must be demonstrated to the lab instructor by the due date for full credit • VHDL listing and simulation results must be signed by and turned into the lab instructor

  8. Projects • Groups of three or four will design and implement a digital system based on a dedicated microprocessor • The project will be demonstrated to the class at the end of the term • Results will be described in a written project report, a poster, and an oral PowerPoint presentation to the class

  9. Course Web Site • Course materials can be downloaded from the following course website • www.cse.secs.oakland.edu/haskell/ • follow the CSE 378 -> ECE/CSE 378 link

  10. Grading based on • Labs/HW -- 20% • 2 Exams -- 25% each • VHDL project • Project design -- 10% • Written report -- 15% • Oral Presentation -- 5%