1 / 1

This research was supported by NIH grant RR020209-01, “FPGA-Based Computational Accelerators.”

Semantic Gap. Value of FPGA acceleration. Cost of FPGA design. BOSTON. UNIVERSITY. FPGA capacity increases →. LAMP: A Tool Suite for Families of FPGA-based Computation Accelerators. Tom VanCourt Martin Herbordt. Create a model with behavior left as parameter to be provided.

dena
Download Presentation

This research was supported by NIH grant RR020209-01, “FPGA-Based Computational Accelerators.”

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Semantic Gap Value of FPGA acceleration Cost of FPGA design BOSTON UNIVERSITY FPGA capacity increases → LAMP: A Tool Suite for Families of FPGA-based Computation Accelerators Tom VanCourt Martin Herbordt • Create a model with behavior left as parameter to be provided. • Logic designer provides • Annotated VHDLReusable control and interface components • App AbstractionInterface definition of application classes and operations • HW AbstractionAbstract definition of FPGA hardware resources • HW Concretion Actual resources present in the FPGA platform • Application specialist provides • App Concretion Actual definitions specific to the application instance • Model Instance Generic accelerator bound to specific HW and application logic • Implement applications as families. • Case study: Dynamic Programming for Approximate String Matching – Choose: • Character by character alignment or goodness-of-match only • Global alignment (with end-rule options) or local, gap parameters • Character type • DNA [2 bits] IUPAC wildcards [4] • Amino acid [5] Codons [6] • Ascii text [8] Unicode 3.0 text [16] • Mismatch scoring, may be parameterized • Accelerator design isn’t logic design. • Accelerators require skilled logic AND requires domain specialists design for high performance for tailoring to details of • specific applications. Model instance Accelerator model for application family Annotated VHDL components HwAbstraction HwConcretion AppConcretion AppAbstraction Result Type Score Only Alignment AlignmentType Local (Smith-Waterman) Global (Needleman-Wunsch) The semantic gap isn’t going away. CharacterType Subclassing creates application- specific data types and behaviors. Nucleotide Amino acid … Codon Wildcard Concrete definition (partial) Abstract definition of character type class IUPAC extends CharType { type Ref {bool: a, c, g, t}; type Que int 0 .. 3; type Score int -1000 .. 1000; const Score scoreZero = 0; match = +1, miss = -10; Score compare(Ref r, Que q) { bool isMatch = (r.a & q==0) | (r.c & q==1) | (r.g & q==2) | (r.t & q==3); … class CharType { abstract type Ref, Que, Score; abstract Score compare( Ref refCh, Que queryCh); abstract const Score zeroScore; } PAM-N BLOSUM-N … ExactMatch Gonnet Compiledcode Machine code C++, Java DomainKnowledge Synthesizedlogic Gates Automated replication makes maximum use of FPGA fabric. Semantic complexity increases→ • Application-specific implementation • can give acceleration > 100. • Application acceleration • Xilinx VP70 Virtex-II Pro • relative to • 3GHz Intel Xeon • Every different application gets individually tuned performance. • Simple applications don’t have to run at ‘worst case’ speed. • Approximate matching application family: • Each component varies individually • Combinatorics work in our favor • Each user creates new possibilities! Smaller PEs - Higher parallelism • FPGAs are near a crossing point. Larger fabric - Increased computing capacity Larger PEs - Don’t constrain other implementations • 2 result types •  17 alignment types •  15 character types • 510 different accelerators • created on demand This research was supported by NIH grant RR020209-01, “FPGA-Based Computational Accelerators.” * M. Gokhale, J. Stone, J. Arnold, and M. Kalinowski. Stream-oriented FPGA computing in the Streams-C high-level language. Proc. FCCM. 2000

More Related