EEE 435 Principles of Operating Systems

1. EEE 435Principles of Operating Systems Computer Hardware Pt II (Modern Operating Systems 1.4) Dr. Alain Beaulieu

2. Quick Review • Slowest to fastest, list the “standard” forms of memory • What are the PC, SP, and PSW registers? Dr. Alain Beaulieu

3. Outline • Main Memory Management • I/O Devices • Device Drivers • Busses Dr. Alain Beaulieu

4. Main Memory Management • Multi-tasking implies multiple programs in memory simultaneously • Problems: • How to protect programs from one another • How to protect the kernel from programs • How to relocate programs Dr. Alain Beaulieu

5. Main Memory Management • Solution One • Compile/link relative to address zero • Loaded programs assigned a limit and base register • Base is added to all addresses program uses • Limit is tested before instruction or other address fetch. Dr. Alain Beaulieu

6. Main Memory Management • Solution Two • May have multiple instances of one program executing • This allows the multiple instance to share the same program but have different data (LB denotes Limit+Base) Dr. Alain Beaulieu

7. Considerations • This management implies multiple programs running at the same time • Switching from one to another wipes out the cache, hurting performance • Memory Management Unit (MMU) needs new registers loaded, requiring additional time to complete the switch. Dr. Alain Beaulieu

8. I/O Devices • I/O devices consist of: • The device itself • A controller (with registers) • The controller simplifies the interface • Tell it you want a track • Converts this to cylinder, sector, and head • OS sees this interface • Software that talks to this controller is the Device Driver Dr. Alain Beaulieu

9. Device Drivers • How do they communicate with the device? • Write to memory mapped to the registers (No special instructions required) • Write to ports mapped to registers (Uses no address space but requires special instructions) Dr. Alain Beaulieu

10. Device Drivers – Busy Waiting • When do they communicate with the device? • Busy Waiting • User program makes a system call • Device driver called by kernel • Driver loops continuously polling the device to query when I/O complete • Disadvantage: CPU completely tied up Dr. Alain Beaulieu

11. Device Drivers – Interrupts • When do they communicate with the device? • Interrupts • Driver starts the controller and instructs it to give an interrupt when I/O is complete • Driver returns; original calling function blocked if required • When the controller completes its work it generates an interrupt • Disadvantage: more complex Dr. Alain Beaulieu

12. Device Drivers - Interrupts 1) Driver writes into controller’s registers. Controller starts the device 2) Controller finishes I/O and signals Interrupt Controller 3) When Interrupt Controller is ready it asserts a pin on the CPU to inform it of the interrupt 4) When CPU is ready, the Interrupt Controller places the number of the device on the bus Dr. Alain Beaulieu

13. Device Drivers - Interrupts • CPU switches to kernel mode • Address of Interrupt Handler determined • (aka Interrupt Vector) • Program flow changed to Interrupt Handler • When handler finished, program flow returned to previously-running program Dr. Alain Beaulieu

14. Device Drivers • When do they communicate with the device? • Direct Memory Access (DMA) • Chip that controls information flow between memory and some controllers • Configured for each transfer by the CPU with number of bytes, device and memory addresses, and direction • When complete, DMA chip signals an interrupt as previously described • Disadvantage: even more complex, but removes much work from the CPU Dr. Alain Beaulieu

15. Busses • Required to move large amounts of information between CPU, memory, devices Dr. Alain Beaulieu

16. Quiz Time! Questions? Dr. Alain Beaulieu