310 likes | 483 Views
EPICS Collaboration Meeting SNS Machine Protection System SNS Timing System. Coles Sibley. 2000-0xxxx/vlb. MPS Design Assumptions. Machine Protection System is not a “Safety Class” or “Safety Significant” System.
E N D
EPICS Collaboration MeetingSNS Machine Protection SystemSNS Timing System Coles Sibley 2000-0xxxx/vlb
MPS Design Assumptions • Machine Protection System is not a “Safety Class” or “Safety Significant” System. • SNS will be built and commissioned in Phases, MPS must accommodate this schedule. • Reliability – The Machine Protection System must inhibit the beam when required. It must fail in a SAFE state. • Availability – The machine availability should be as high as possible. The MPS must be easy to configure and have a “friendly” operator interface. False trips must be minimized.
Machine Protection System • Run Permit System (1 second) • Coordinates machine mode changes. • Scans IOC configurations for Software Configuration errors. • EPS interface for masking equipment inputs. • Hard Wired Protect (~ 33 msec) • Latched in Hardware • Redundancy through FPLS inputs • Fast Protect Latched System (< 20 microseconds) • Latches fault conditions until fault clears and Operator resets condition. FPS_PERMIT_LINK_A carrier interrupted and inhibits beam through front end devices. • Fast Protect Auto Reset (20 microseconds) • Inhibits beam for duration of macro pulse by disabling FPS_PERMIT_LINK_B carrier to the front end. Restores Fast Protect link for next pulse if fault restored to normal.
Fast Protect – Auto Reset • ALARA – Pulse Width Modulation • Concentrates Permit Inputs • Inhibits carrier link to disable Beam • Inputs: • Loss Monitors • Software trip points, bypass • Beam position monitors • Software trip points, bypass • RF Low level Controls
Fast Protect - Latched System • Concentrates Permit Inputs • Inhibits carrier link to disable beam • Devices bypassed by Key or PLC • Inputs disabled by machine mode (event link) • Equipment maintained in locked racks • Documentation control of changes • System verification after changes
MPS Input Bypass Mechanisms • Mode Mask • Global database contains operating mode dependant devices. Devices not required for present mode are masked through hardware. Masks changed with database reconfiguration and IOC reboot. • Jumper / Key / PLC Bypass • Software bypass requires set of closed contacts from a jumper, key, or PLC contacts. • Software Bypass • If hardware configuration allows, input bypassed through software with appropriate EPICS Access Security permissions.
MPS Software • Database (Oracle) • Access Security Files • EPICS database • RPS configuration database • Alarms, IOC startup scripts, Archives • Run Permit System • SNL programs • Machine mode changes • System Verification • Beam current (Loss) accounting system • Operator Interface - EDM • Device / Driver support routines.
SNS Timing System • Modified Brookhaven Design • Timing Master (60 Hz PLL) - LANL • RTDL Master – BNL • Event Link Master – BNL • Utility Module – LANL • Timing Slaves (V124-S) - BNL • Machine Protection – SNS • Diagnostics EL-RTDL receivers - LBNL
Timing Master • Provides 60 / 120 Hz system pulses • Follows line to within +/- 500 usec • Extraction time fixed ~5 msec in advance • Neutron Choppers follow Timing Master (60 Hz system pulses) • Accelerator timing follows Timing Master
SNS Timing Links(Drivers in progress at BNL) • Event Link (16 x Ring RF frequency) • Phase locked to Ring RF • 256 Events or triggers, 64 hardware – 192 software • Events Prioritized (High priority, no jitter) • RTDL – Real Time Data Link (10 MHz Carrier) • Design based on RHIC RTDL System • Up to 256 Frames (1 start bit, 8 address bits, 24 data bits, 8 CRC bits per frame) • Provides Synchronous data facility wide. • One broadcast per machine cycle
SNS Timing Distribution DELAY MODULE SNS Timing Encoder 1x 8 fan out F/o Tx F/o Tx F/o Tx For local use To Front End To HEBT To MCR To Ring Multimode fiber
Event Link • Event link – PLL 16 * Ring RF • LEBT Chopper – 4 * EL carrier to create mini and macro pulses • Event link distributes timing for accelerator, diagnostics, extraction and high resolution time stamps • Diagnostics – PLL 4 * EL carrier • Timing Slave (V124S module - BNL) • Gate Width – 16 bits, Carrier * 2 (~33.9 MHz) • Gate Delays • Revolution delay - 16 bit, Ring RF frequency • Sub revolution delay – 8 bit, 16 * RF • Line delay – delays from 12 to 139 nsec • Jitter < 5 nsec
Time of day (IOC time stamps) Event Link Period (psecs) to converts counts to real time Operating Mode (beam area, beam power, pulse length limits) 60 Hertz phase difference Beam Parameters for LEBT Chopper Previous pulse beam data Data acquisition mode Beam profile ID IOC Reset Address (Beam aborted if CRC error detected) Data Transmitted on RTDL
SNS Job Openings www.sns.gov/jobs/jobs_AMT.htm Accelerator Physicist (9292) Accelerator Systems Hardware Engineer (1050) Beam Diagnostics Engineer (1846) Chief Accelerator Operators (1552) Control Systems Software Engineer (3343) Engineering Assistant—LLRF (1630) Engineering Assistants—Power Supply (6334) Engineering Assistant—Pulsed Power Systems (7630) Engineering Assistants—Survey and Alignment (3891) Mechanical Engineer—Cryogenics (5061) Mechanical Engineering Team Leaders (9983) Pulsed-Power Engineer ((1379) RF Engineer—High Power (1052) RF Engineers—Low Level (1229) Senior Mechanical Designers (3172) Senior Power Supply Engineers (6310) Vacuum Engineers (4257)