ee 328 digital systems and computer design wednesday august 20 2014
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EE 328 Digital Systems and Computer Design Wednesday, August 20, 2014. Topics Syllabus Introduction Quick EE 229 Review Design Space Homework See website Review basic combinational Verilog models for Friday. EE 328 Digital Systems and Computer Design Wednesday, August 20, 2014. Syllabus

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ee 328 digital systems and computer design wednesday august 20 2014
EE 328 Digital Systems and Computer DesignWednesday, August 20, 2014
  • Topics
    • Syllabus
    • Introduction
    • Quick EE 229 Review
    • Design Space
  • Homework
    • See website
    • Review basic combinational Verilog models for Friday
ee 328 digital systems and computer design wednesday august 20 20141
EE 328 Digital Systems and Computer DesignWednesday, August 20, 2014
  • Syllabus
  • Introduction
    • digital systems
ee 328 digital systems and computer design wednesday august 20 20143
EE 328 Digital Systems and Computer DesignWednesday, August 20, 2014
  • EE 229 Review
    • combinational analysis
      • write logic expressions given circuit diagram
      • perform timing analysis
      • perform power requirements analysis
    • combinational synthesis
      • given problem
        • derive expression / truth table
        • derive minimal expression / logic diagram
        • implement meeting timing and power constraints
ee 328 digital systems and computer design wednesday august 20 20144
EE 328 Digital Systems and Computer DesignWednesday, August 20, 2014
  • EE 229 Review
    • combinational medium and large-scale functions
      • multiplexers / demultiplexers
      • decoders / encoders
      • adders & subtracters
      • comparators
      • programmable devices
ee 328 digital systems and computer design wednesday august 20 20145
EE 328 Digital Systems and Computer DesignWednesday, August 20, 2014
  • EE 229 Review
    • sequential machine analysis
      • given circuit write excitation and output expressions
      • derive next-state functions
      • construct state table / state diagram
      • construct timing diagram
ee 328 digital systems and computer design wednesday august 20 20146
EE 328 Digital Systems and Computer DesignWednesday, August 20, 2014
  • EE 229 Review
    • sequential machine synthesis
      • Given Problem
        • draw state diagram
        • construct state table
        • choose method, flip-flops and assign states
        • write excitation and output expressions
        • implement meeting timing and power constraints
ee 328 digital systems and computer design wednesday august 20 20147
EE 328 Digital Systems and Computer DesignWednesday, August 20, 2014
  • Design Space
    • target technologies
    • parameters
  • Integrated Circuits
    • “chips”
    • levels of integration
      • SSI: less than 10 gates
      • MSI: 10 to 100 gates
      • LSI: 100 to a few thousand gates
      • VLSI: several thousand gates to hundreds of millions of gates
ee 328 digital systems and computer design wednesday august 20 20148
EE 328 Digital Systems and Computer DesignWednesday, August 20, 2014
  • CMOS
    • complementary metal-oxide semiconductor
    • high performance at low power
  • Technology Parameters
    • fan-in
    • fan-out
    • noise margin
    • cost
    • propagation delay
    • power consumption
ee 328 digital systems and computer design wednesday august 20 20149
EE 328 Digital Systems and Computer DesignWednesday, August 20, 2014
  • Gate Propagation Time
    • high-to-low time: tPHL
    • low-to-high time: tPLH
    • transport delay
    • inertial delay
    • inherent delay
    • load delay: due to capacitance loading
ee 328 digital systems and computer design wednesday august 20 201410
EE 328 Digital Systems and Computer DesignWednesday, August 20, 2014
  • Flip-Flop Timing
    • setup time: ts
    • hold time: th
    • minimum clock pulse width: tw
    • propagation delay: tPHL, tPLH, tpd
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