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Mastering Protected Mode Memory Access in Microprocessor Systems

Learn how to access memory in protected mode, distinguishing between local and global accesses using segment registers. Explore GDT and LDT structures to locate and utilize descriptor tables effectively.

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Mastering Protected Mode Memory Access in Microprocessor Systems

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  1. 16.317Microprocessor Systems Design I Instructor: Dr. Michael Geiger Spring 2013 Lecture 18: Protected mode examples

  2. Lecture outline • Announcements/reminders • HW 3 due 3/22 • Lab 2 due 4/5 • Exam 2: Wednesday, 3/27 • Reference material to be posted • Today’s lecture • Protected mode examples Microprocessors I: Lecture 18

  3. Review: protected mode memory accesses • Determine if access is local or global • Use TI bit in selector • Segment registers now function as selectors • TI == 0  global access • TI == 1  local access • Find the starting address of the appropriate descriptor table • Global access uses GDT • GDTR holds base/limit of GDT • Local access uses current LDT • LDTRcache holds base/limit of LDT Microprocessors I: Lecture 18

  4. Review: protected mode memory accesses • Find the right descriptor in GDT/LDT • Index field in selector chooses entry in GDT/LDT • Tables are 0 indexed  1st descriptor = descriptor #0 • Starting address of descriptor = (table base) + (index * 8) • Descriptor holds base/limit for segment • Use the segment base address found in the descriptor to calculate the physical address • Physical address = (segment base) + (EA) Microprocessors I: Lecture 18

  5. Review: local descriptor table • Each task has its own local descriptor table • LDT changes every time you change tasks • Base/limit of that table changes • LDTR cache holds LDT base (32 bits) and limit (16 bits) • LDT base/limit for each task is stored in a descriptor in the GDT • LDTR: selector pointing to GDT entry describing LDT for current task • TI == 0 in LDTR • Index point to descriptor with LDT base/limit for current task • On task switch, LDTR changed and LDT base/limit reloaded Microprocessors I: Lecture 18

  6. Protected mode memory access examples • See handout Microprocessors I: Lecture 18

  7. Final notes • Next time: HLL  assembly • Announcements/reminders • HW 3 due 3/22 • Lab 2 due 4/5 • Exam 2: Wednesday, 3/27 • Reference material to be posted Microprocessors I: Lecture 18

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