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This paper presents a comprehensive review of the Fast Fourier Transform (FFT) and introduces the Radix-43 algorithm as a novel approach to FFT architecture. The authors, K. Babionitakis and others, discuss the architectural specifications, advantages, and efficiency of the proposed design. Key benefits include reduced stages, maximized throughput, and capability to handle large input data sets under varying conditions. This research was presented at the 13th IEEE International Conference (ICECS) in December 2006, providing insights into high-performance VLSI design strategies for FFT applications.
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A HIGH PERFORMANCE VLSI FFT ARCHITECTURE K. Babionitakis, K. Manolopoulos, K. Nakos, D. Reisis, N. Vlassopoulos and V.A. Chouliaras, Electronics, Circuits and Systems, ICECS. 13th IEEE International Conference on 10-13 Dec. 2006 pp. 810 – 813. Presenter: Cheng - Yeh Tsao
Outline • Review FFT (Fast Fourier Transform) • The Radix-43 Algorithm • Architecture • Architecture Advantages • Reference
Review FFT (Fast Fourier Transform) For 0 ≦ k ≦ N-1 DFT : O (N2) FFT : O (N/2 (logr N) )
Outline • Review FFT (Fast Fourier Transform) • The Radix-43 Algorithm • Architecture • Architecture Advantages • Reference
Outline • Review FFT (Fast Fourier Transform) • The Radix-43 Algorithm • Architecture • Architecture Advantages • Reference
Architecture(1/4) Overall FFT Architecture
Architecture(2/4) R43 Butterfly Architecture
Architecture(3/4) Radix-4 Butterfly Architecture
Architecture(4/4) DFF:D Flip-Flop Accumulator Architecture
Outline • Review FFT (Fast Fourier Transform) • The Radix-43 Algorithm • Architecture • Architecture Advantages • Reference
Architecture Advantages • Reduce the number of stages • Maximizing throughput • Large input data sets • Worst-case • 0.9V, 125℃ • 604.5 MHz • Typical conditions (1.0V, 25 ℃) • Exceeded the 1GHz rate
Outline • Review FFT (Fast Fourier Transform) • The Radix-43 Algorithm • Architecture • Architecture Advantages • Reference
Reference • A HIGH PERFORMANCE VLSI FFT ARCHITECTURE K. Babionitakis, K. Manolopoulos, K. Nakos, D. Reisis, N. Vlassopoulos and V.A. Chouliaras, Electronics, Circuits and Systems, ICECS. 13th IEEE International Conference on 10-13 Dec. 2006 pp. 810 – 813. • A New Approach to Pipeline FFT Processor S. He and M. Torkelson, Department of Applied Electronics, Lund University, S-22100 Lund, SWEDEN, 1996 IEEE. • 朱展毅老師的講義