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Tera-Pixel APS for CALICE

Discussing the charge collection simulation model and exploring different diode reset options and noise simulations. Examining various circuits and their operating points.

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Tera-Pixel APS for CALICE

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  1. Tera-Pixel APS for CALICE Progress meeting, 6th June 2006 Jamie Crooks, Microelectronics/RAL

  2. Charge collection simulation model • So far have been using a 100ns pulse of constant current to model a physics hit • Guilio recommended an exponential decay would be more appropriate • Guilio sent some numerical data for hits – have estimated a decay time constant • Example simulations show subtle difference in circuit response & verify correct calculation from simulation parameter number_of_electrons • Will use this model from now on Diode voltage when in wired-reset configuration Pulse profile of current drawn off pixel diode Diode voltage when floating

  3. Vrst Diode Reset Options Rst Pulsed Hard Reset Wired Hard Reset Wired Soft Reset Flushed Reset Vrst Rst Vdiode

  4. Diode Reset Options: Transient Noise Simulations Pulsed Hard Reset Wired Hard Reset Wired Soft Reset Flushed Reset

  5. Diode operating point • Capacitance of diode increases for higher voltages • By choosing to bias the diode favourably will achieve higher voltage for same charge deposit • Operating point may be set by analog-sum circuit or other constraints, may not have the choice! • 0.9umx0.9um diode • Hard reset to “op_point”

  6. “Operating point” Parallel Diodes + Source Follower Vout

  7. Diode Sum: Source Followers

  8. (4 Parallel Diodes) Source Follower: Gain vs Diode voltage: Process Corners Voltage Gain 

  9. “Operating point” Inverter Sum bias Vout

  10. Diode Sum: Other Circuits

  11. Inverter Sum + feedback bias Vout

  12. Diode Sum: New Inverter with Feedback

  13. Diode Sum: New Inverter with Feedback In progress – most promising circuit for analog sum, with a few concerns…

  14. 1st Auto-zero Comparator φ1 Vin φ1: Reset: Unity gain amplifier stores amp and signal offsets on capacitor Vout φ2: Compare: Open loop amplifier compares auto-zeroed signal with reference + threshold φ1 φ2 Vref Vref+Vth 1uA not quite enough current to meet speed required (quick test) – principal demonstrated in simulation

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