Formal Property Qualification

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# Formal Property Qualification - PowerPoint PPT Presentation

Formal Property Qualification. 學生 : 秦勢翔 陳政揚 執導教授 : 曾王道. 對於仿真的數位電路來說缺乏詳盡的驗證是一個非常大的問題，精確的驗證使用數學上公式來證明此問題的正確性。. 簡介. 流程如下 此圖顯示一個驗證的程序，圖中的 Model Checking 為一個用來判斷結果是否正確的工具， Model 要有足夠的能力決定出設計是否正確. Original program code: a = b | c; Mutated program: a = b & c;. What is mutant??.

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## Formal Property Qualification

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### Formal Property Qualification

Original program code:

• a = b | c;
• Mutated program:
• a = b & c;
What is mutant??

(2) 化簡M資料，去除不必要的判斷，增加判斷上的效率。

Model checking& Input / Output

• Input
• Design M: written in DIMACS CNF format

Model checking& Input / Output

• Input
• Property P[1] : written in DIMACS CNF format

Model checking& Input / Output

• Input
• The concatenation of M and P[1]: (M, P[1])
• Given a (M, P[i]) pair, we denote the model checking as
• SAT (M, P[i])
• If the solver returns TRUE
• Msatisfies the property P[i]
• Otherwise, returns FALSE
• M violates P[i]

Model checking& Input / Output

• Model checking
• foreachP[i], ( 0 < i <= n )
• SAT (M, P[i]) = TRUE
• One of the following program changes of the original M
• a literal is always positive
• a literal is always negative
• a literal is negated compared with M

Model checking& Input / Output

• Model checking
• A Mutant M[2]: which uses program change rule (1)

Model checking& Input / Output

• Model checking
• A Mutant M[4]: which uses program change rule (3)

Model checking& Input / Output

• Output
• write a program to determine as many “live” mutants as possible
• foreachM[k], ( 0 < k <= m)
• CheckforeachP[i], ( 0 < i <= n )
• SAT (M[k], P[i]) == TRUE
• Are there any approaches to reduce the complexity?

1 工作平台及程式語言(Platform and Programming Language)

2 測試檔輸出 (Test Output)

3.TIME :

realuserreport live

參考資料 (References)

[1] Properties Incompleteness Evaluation by Functional Verification, Andrea

Fedeli, Franco Fummi, and Graziano Pravadelli, IEEE Transactions on Computers,

Apr. 2007.

[2] Mutation 2000: Uniting the Orthogonal, Jeff Offutt and Roland H. Untch,

Mutation 2000: Mutation Testing in the Twentieth and the Twenty First Centuries,

pages 45-55, October 2000. [3] A Novel Mutation-Based Validation Paradigm for High-Level Hardware

Descriptions, Jorge Campos and Hussain Al-Asaad, IEEE Transactions on Very

Large Scale Integration (VLSI) Systems, Nov. 2008.

[4] DIMACS CNF format: http://www.cs.ubc.ca/~hoos/SATLIB/benchm.html

[5] Unified Formal and Dynamic Verification Closure: Can Mutations Bridge the

Gap? Mickael Moreau, Olivier Haller, Mirella Negro Marcigaglia, Laurent

Martin-Borret, SofieneMejri, DVCon 2009

[6] C++ PRIMER FOURTH EDITION, Stanly B.Lippman , JoseeLajoie , Barbara

E.Moo