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Microprocessor System Design Programmable Interrupt Controller. Omid Fatemi (omid@fatemi.net). Outline. Interrupts in PC Interrupts and calls 8259 – PIC Programming 8259 Interfacing 8259 in PC. What is Interrupt. 8086/88 Interrupts. 256 Interrupts. Types 00 ……. FF.

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microprocessor system design programmable interrupt controller

Microprocessor System DesignProgrammable Interrupt Controller

Omid Fatemi

(omid@fatemi.net)

outline
Outline
  • Interrupts in PC
  • Interrupts and calls
  • 8259 – PIC
  • Programming 8259
  • Interfacing 8259 in PC
8086 88 interrupts
8086/88 Interrupts
  • 256 Interrupts.
  • Types 00 ……. FF.
  • Type is provided in a specified timing.
answering an interrupt
Answering an Interrupt
  • Save status
    • FR, IP, CS
  • Service the interrupt
    • Interrupt service routing (ISR) or Interrupt handler
    • Based on Interrupt vector number
    • From Interrupt vector table
    • Four bytes for every interrupt: CS:IP
  • Return to original position by IRET
difference with call
Difference with Call
  • CALL FAR can jump to any location (1M range)
  • Hardware interrupts can come at any time.
  • Interrupts are maskable.
  • After CALL only CS:IP is saved
  • End of routine: RETF vs. IRET.
interrupt categories
Interrupt Categories
  • Hardware interrupts:
    • Only 3 pin, but how 256 interrupt?
    • INTR (in), NMI (in), and INTA (out)
    • INTR can be masked by CLI / STI
    • Active high.
      • 80x86 finished instruction.
      • Push FR, CS, IP
    • NMI: INT 02.
  • Software interrupts
    • INT nn
    • Example: INT 21H (DOS functions)
predefined interrupts
Predefined Interrupts
  • INT 00 (divide error)
  • INT 01 (single step)
    • Set Trap flag (how?)
    • PUSHF, POP AX, …
    • Trace in debug
  • INT 02 (NMI)
  • INT 03 (breakpoint)
  • INT 04 (signed number overflow)
    • INT) instruction
      • Examine Interrupt vector table.
      • Examine INT 12H (size of conventional RAM in AX)
masking and prioritization
Masking and Prioritization
  • OCW (operation command word)
8259 in pc xt
8259 in PC XT

ICW1: 13H

ICW2: 08H

ICW3: 09H

edge triggered and interrupt sharing
Edge Triggered and Interrupt Sharing
  • Level triggered mode: IRQ line should be brought down before EOI.
  • Edge triggered mode: noise on IRQ lines might cause false interrupts.
  • New computer and busses.
    • Level triggered.
    • Interrupt sharing.
problems and hw7
Problems and HW7
  • hDue Saturday 24 Khordad (in class)
  • 30, 31, 40, 53, 61
  • Page 226
  • Other problems:
  • 1, 2, 18, 21, 22
  • 30, 31, 40, 41
  • 53, 61, 68, 75
  • Section 6.5: examples 7, 8, 9