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# VLSI Arithmetic Adders &amp; Multipliers

VLSI Arithmetic Adders &amp; Multipliers. Prof. Vojin G. Oklobdzija University of California http://www.ece.ucdavis.edu/acsel. Digital Computer Arithmetic belongs to Computer Architecture, however, it is also an aspect of logic design.

## VLSI Arithmetic Adders &amp; Multipliers

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1. VLSI ArithmeticAdders & Multipliers Prof. Vojin G. Oklobdzija University of California http://www.ece.ucdavis.edu/acsel

2. Digital Computer Arithmetic belongs to Computer Architecture, however, it is also an aspect of logic design. The objective of Computer Arithmetic is to develop appropriate algorithms that are utilizing available hardware in the most efficient way. Ultimately, speed, power and chip area are the most often used measures, making a strong link between the algorithms and technology of implementation. Introduction Computer Arithmetic

3. Addition Multiplication Multiply-Add Division Evaluation of Functions Multi-Media Basic Operations Computer Arithmetic

5. Addition of Binary Numbers Full Adder. The full adder is the fundamental building block of most arithmetic circuits:   The sum and carry outputs are described as: ai bi Full Adder Cout Cin si Computer Arithmetic

6. Inputs Outputs ci ai bi si ci+1 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Addition of Binary Numbers Propagate Generate Propagate Generate Computer Arithmetic

7. Full-Adder Implementation Full Adder operations is defined by equations: Carry-Propagate: and Carry-Generate gi One-bit adder could be implemented as shown Computer Arithmetic

8. High-Speed Addition One-bit adder could be implemented more efficiently because MUX is faster Computer Arithmetic

9. The Ripple-Carry Adder Computer Arithmetic

10. The Ripple-Carry Adder From Rabaey Computer Arithmetic

11. Inversion Property From Rabaey Computer Arithmetic

12. Minimize Critical Path by Reducing Inverting Stages From Rabaey Computer Arithmetic

13. Ripple Carry Adder Carry-Chain of an RCA implemented using multiplexer from the standard cell library: Critical Path Oklobdzija, ISCAS’88 Computer Arithmetic

14. Manchester Carry-Chain Realization of the Carry Path • Simple and very popular scheme for implementation of carry signal path Computer Arithmetic

15. Original Design T. Kilburn, D. B. G. Edwards, D. Aspinall, "Parallel Addition in Digital Computers: A New Fast "Carry" Circuit", Proceedings of IEE, Vol. 106, pt. B, p. 464, September 1959. Computer Arithmetic

16. Manchester Carry Chain (CMOS) • Implement P with pass-transistors • Implement G with pull-up, kill (delete) with pull-down • Use dynamic logic to reduce the complexity and speed up Kilburn, et al, IEE Proc, 1959. Computer Arithmetic

17. Pass-Transistor Realization in DPL Computer Arithmetic

18. Carry-Skip Adder MacSorley, Proc IRE 1/61 Lehman, Burla, IRE Trans on Comp, 12/61 Computer Arithmetic

19. Carry-Skip Adder Bypass From Rabaey Computer Arithmetic

20. Carry-Skip Adder:N-bits, k-bits/group, r=N/k groups Computer Arithmetic

21. Carry-Skip Adder k Computer Arithmetic

22. Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Computer Arithmetic

23. Carry-chain of a 32-bit Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Computer Arithmetic

24. Carry-chain of a 32-bit Variable Block Adder(Oklobdzija, Barnes: IBM 1985) 6 5 5 4 4 3 3 D=9 1 1 Any-point-to-any-point delay = 9 D as compared to 12 D for CSKA Computer Arithmetic

25. Carry-chain block size determination for a 32-bit Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Computer Arithmetic

26. Delay Calculation for Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Delay model: Computer Arithmetic

27. Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Variable Group Length Oklobdzija, Barnes, Arith’85 Computer Arithmetic

28. Carry-chain of a 32-bit Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Variable Block Lengths • No closed form solution for delay • It is a dynamic programming problem Computer Arithmetic

29. Delay Comparison: Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Computer Arithmetic

30. Delay Comparison: Variable Block Adder VBA CLA VBA- Multi-Level Computer Arithmetic

31. VLSI ArithmeticLecture 4 Prof. Vojin G. Oklobdzija University of California http://www.ece.ucdavis.edu/acsel

32. Review Lecture 3

33. Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Computer Arithmetic

34. Carry-chain of a 32-bit Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Computer Arithmetic

35. Carry-chain of a 32-bit Variable Block Adder(Oklobdzija, Barnes: IBM 1985) 6 5 5 4 4 3 3 D=9 1 1 Any-point-to-any-point delay = 9 D as compared to 12 D for CSKA Computer Arithmetic

36. Carry-chain block size determination for a 32-bit Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Computer Arithmetic

37. Delay Calculation for Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Delay model: Computer Arithmetic

38. Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Variable Group Length Oklobdzija, Barnes, Arith’85 Computer Arithmetic

39. Carry-chain of a 32-bit Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Variable Block Lengths • No closed form solution for delay • It is a dynamic programming problem Computer Arithmetic

40. Delay Comparison: Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Computer Arithmetic

41. Delay Comparison: Variable Block Adder Square Root Dependency VBA Log Dependency CLA VBA- Multi-Level Computer Arithmetic

42. Circuit Issues • Adder speed can not be estimated based on: • logic gates in the critical path • number of transistors in the path • logic levels in the path • Estimating Adders speed is much more complex and many of the “fast” schemes may be misleading you. Computer Arithmetic

43. Fan-Out Dependency Computer Arithmetic

44. Fan-In Dependency This looks like “Logical Effort” (1985) Computer Arithmetic

45. Delay Comparison: Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Computer Arithmetic

46. Computer Arithmetic

47. Carry-Lookahead Adder(Weinberger and Smith, 1958) ARITH-13: Presenting Achievement Award to Arnold Weinberger of IBM (who invented CLA adder in 1958) Ref: A. Weinberger and J. L. Smith, “A Logic for High-Speed Addition”, National Bureau of Standards, Circ. 591, p.3-12, 1958. Computer Arithmetic

48. CLA Definitions: One-bit adder Computer Arithmetic

49. CLA Definitions: 4-bit Adder Computer Arithmetic