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Lecture 18: Bipolar Single Stage Amplifiers

Lecture 18: Bipolar Single Stage Amplifiers. Prof. Niknejad. Lecture Outline. BJT Amps BJT Biasing Common Emitter Amp Common Base Amp Common Collector Amp AKA Emitter Follower β Multiplier Concept Emitter Degeneration. Bipolar Amplifiers. Common-emitter amplifier:. Biasing: adjust

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Lecture 18: Bipolar Single Stage Amplifiers

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  1. Lecture 18:Bipolar Single Stage Amplifiers Prof. Niknejad

  2. Lecture Outline • BJT Amps • BJT Biasing • Common Emitter Amp • Common Base Amp • Common Collector Amp • AKA Emitter Follower • β Multiplier Concept • Emitter Degeneration University of California, Berkeley

  3. Bipolar Amplifiers Common-emitter amplifier: Biasing: adjust VBIAS= VBE sothat IC = ISUP. University of California, Berkeley

  4. Small-Signal Two-Port Model Parameters: (IC = 1 mA, β =100, VA = 3V) University of California, Berkeley

  5. Common-Base Amplifier To find IBIAS, note that IBIAS = IE = - (1/F)IC Common-base current gain Ai = - F University of California, Berkeley

  6. CB Input Resistance Summing currents at the input node: small University of California, Berkeley

  7. CB Output Resistance put rocback in after finding vt / it note polarity Same topology as CG amplifier, but with r || RS rather than RS University of California, Berkeley

  8. Output Impedance Details • First draw small signal equivalent circuit with transistor and simplify as much as possible • Then (if needed) add the small signal equivalent circuit • If frequency is low, get rid of caps! University of California, Berkeley

  9. Output Impedance Calculation University of California, Berkeley

  10. Common-Base Two-Port Model Why did we consider it a current amp? • Current Amp : • Unity Current Gain (-1) • Small Input Impedance • Large (huge!) Output Impedance University of California, Berkeley

  11. Common-Collector Amplifier DC Bias: output is one “VBE drop” down from input “Emitter Follower” University of California, Berkeley

  12. Common-Collector Input Resistance University of California, Berkeley

  13. Common-Collector Output Resistance Divider between vt and v : University of California, Berkeley

  14. Common-Collector Output Res. (cont) • Looking into base of emitter follower: load impedance larger by factor β+1 • Looking into emitter of follower: “source” impedance smaller by factor β+1 University of California, Berkeley

  15. Common-Collector Voltage Gain KCL at the output node: note v = vt- vout University of California, Berkeley

  16. Common-Collector Two-Port Model typo: RL • Voltage Amp : • Unity Voltage Gain (+1) • Large Input Impedance • Small Output Impedance University of California, Berkeley

  17. Summary of Two-Port Parameters University of California, Berkeley

  18. Typical “Discrete” Biasing • A good biasing scheme must be relatively insensitive to transistor parameters (vary with process and temperature) • In this scheme, the base current is given by: • The emitter current: University of California, Berkeley

  19. Gain for “Discrete” Design • Let’s derive it by intuition • Input impedance can be made large enough by design • Device acts like follower, emitter=base • This signal generates a collector current Can be made large to couple All of source to input (even with RS) University of California, Berkeley

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