tutorial iti1100 l.
Download
Skip this Video
Loading SlideShow in 5 Seconds..
Tutorial: ITI1100 PowerPoint Presentation
Download Presentation
Tutorial: ITI1100

Loading in 2 Seconds...

play fullscreen
1 / 16

Tutorial: ITI1100 - PowerPoint PPT Presentation


  • 156 Views
  • Uploaded on

Tutorial: ITI1100. Dewan Tanvir Ahmed SITE, UofO. Question 4-5.

loader
I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.
capcha
Download Presentation

PowerPoint Slideshow about 'Tutorial: ITI1100' - annissa


An Image/Link below is provided (as is) to download presentation

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.


- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript
tutorial iti1100

Tutorial: ITI1100

Dewan Tanvir Ahmed

SITE, UofO

question 4 5
Question 4-5
  • Design a combinatorial circuit with three inputs, x, y, and x and three outputs, A, B, and C. When the binary input is 0, 1, 2, or 3, the binary output is one greater than the input. When the binary input is 4, 5, 6, or 7, the binary output is one less than the input.
question 4 6
Question 4-6
  • A majority circuit is a combinatorial circuit whose output is equal to 1 if the input variables have more 1’s than 0’s. Design a 3-input majority circuit
question 4 10
Question 4-10
  • Design a 4-bit combinational circuit 2’s complementer. Show that the circuit can be constructed using exclusive-OR gates. Can you predict what the output functions are for a 5-bit 2’s complementer?
question 4 11
Question 4-11
  • Design a 4-bit combinational circuit incrementer. The circuit can be designed using 4 half adders.
question 4 22
Question 4-22
  • Design a excess-3-to-binary decoder using NOR gates only. Include an enable input.
question 4 27
Question 4-27
  • A combinational circuit is specified by following three Boolean functions:

F1 =  (2, 4, 7)

F2 =  (0, 3)

F3 =  (0, 2, 3, 4, 7)

Implement the circuit with a decoder constructed with NAND and NAND or AND gates connected to the decoder outputs. Use a block diagram for the decoder. Minimize the number of inputs in the external gates.

question 4 32
Question 4-32
  • Implement the following Boolean function with a multiplexer:

F(A, B, C, D)=  (0, 1, 3, 4, 8, 9, 15)