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『Microwave Device』 Term Project High Q, 3D Inductors for RF-IC. Bioelectonic Systems Lab. Choongjae Lee ( 2001-21538) eatspace@helios.snu.ac.kr. Introduction. RF-IC requires high performance passive components as an integrated form to reduce the total system size and assembly cost .

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Microwave device term project high q 3d inductors for rf ic

『Microwave Device』 Term ProjectHigh Q, 3D Inductors for RF-IC

Bioelectonic Systems Lab.

Choongjae Lee (2001-21538)

eatspace@helios.snu.ac.kr


Introduction
Introduction

  • RF-IC requires high performance passive components as an integrated form to reduce the total system size and assembly cost.

  • High performance RF inductors are the key components for implementing critical building blocks such as low noise RF VCOs, low loss impedance matching networks, passive filters, and inductive loads for power amplifiers.

  • High Q inductors are critical for lowering power dissipation, and improving the performance of personal RF communication devices such as cellular phones.


Inductor q factor
Inductor Q Factor

  • Definition of Q Factor

    • f : Operating freq.

    • Rm(f) : Real Parts of the inductor impedance

    • Xm(f) : Imaginary parts of the inductor Impedance

  • Degradation of Q

    • Losses from coil Resistance - Frequency dependent (∵skin depth effects) thick metallization

    • Self resonance of the coil parameter control (ex. turn number, turn to turn spacing, metal width)

    • Losses from eddy currents circulation below the spiral in the silicon substrate (proximity effects)


  • Techniques for high q
    Techniques for High Q

    < Ohmic loss reducing >

     Thick metallization, multilayer metallization

    < Eddy current reducing >

     Patterned ground shield below the inductor

     Thick or low dielectric layer to separate the spiral from the substrate

     Using high resistivity (>4kΩ) silicon or ceramic, glass as the substrate

     Etching away the underlying substrate

    • Fabrication a suspended inductor

    • 3D on chip inductorminimize the device capacitive coupling to the substrate and eddy current loss


    Ex1 suspended spiral inductor 1
    Ex1) Suspended Spiral Inductor-[1]

    • Using MEMS technology.

    • The inductor is sustained with the T-shaped pillars.


    Continued
    Continued

    • Separation between the substrate and the inductor Great improvements in Q-Factor

    • Qmax is 37 for the L of 4.2nH with a suspended height of 60㎛


    Idea 3d solenoid design
    Idea) 3D Solenoid Design

    • In comparison to planar spiral inductors, 3D solenoid inductors have less substrate parasitic capacitance since only partial parts of the coil, the bottom conductors, are facing or touching the substrate

    • 3D solenoid inductors have significantly less eddy current induced substrate loss than planar spiral inductors since the core center is in the direction parallel to the substrate

    • Core-loss can be minimized using low loss-tangent core such as alumina.

    • For post IC integration approach processing temperature must not exceed approximately 450℃


    Ex2 3d on chip inductor 2
    Ex2) 3D on Chip Inductor–[2]

    • 3D  minimize the device capacitive coupling to the substrate and eddy current loss minimize coil area

    • Thick copper  reduce the series resistance

    • Core = alumina (negligible loss tangent at high freq.)


    Continued1
    Continued

    • Wafer passivation with 10㎛ Low Temp. Oxide

    • Cu(3000Å)/Ti(500Å) Sputtering

    • 8㎛ thick electroplated resist and patterning

    • To prevent oxidation, Cu is passivated with Au/Ni

    • The PR and Cu/Ti seed layer removing

    • Core forming from alumina sheet

    • Side and top cu patterning with direct write laser lithography tool


    Continued2
    Continued

    • Standard Si sub (10Ωcm)

    • Amenable to monolithic integration in a standard IC process due to its low thermal budget

    • Q is 30for the L of 4.8nH at 1GHz


    Ex3 3d solenoid inductor 3
    Ex3) 3D solenoid inductor–[3]

    • Utilizing deformation of a sacrificial thick polymer and conformal photoresist electrodeposition techniques.


    Continued3
    Continued

    • Substrate Insulation, sputtering of electroplating base (2000ÅCu/1000ÅTi)

    • 15㎛ thick SU-8 resist coating (polymeric mold for bottom conductor electrodeposition), Metal electroplating

    • Deposition a polymeric mesa, SJR5740

    • 120℃ Hard cure for 6hours to deform bell-shaped profile, sputtering of electroplating base, PEPR2400 photoresist is applied using electrodeposition

    • Ni-Cu electroplating through the PEPR2400 mold to form top conductor

    • Sacrificial layers and electroplating base removing


    Ex4 surface micromachined solenoid inductor 4
    Ex4) Surface Micromachined Solenoid Inductor–[4]

    • Using an ordinary IC process having several metal layers

    • 20 turn, all-copper solenoid inductor


    Continued4
    Continued

    • On-Si with a 15㎛ thick insulating layer Q = 16.7 at 2.4GHz with L of 2.67nH

    • On-glass  Q = 25.1 at 8.4GHz with L of 2.3nH

       The inferior Q factor performance of the on-Si inductor originates from the relatively large increase in the parasitic capacitance to the substrate.


    Idea toroidal geometry
    Idea) Toroidal Geometry

    • Higher Q compared to planar coils and lower interference with surrounding circuits

    • Most of the electromagnetic field is concentrated inside the torus.

    • Magnetic flux away from ground planes and semiconducting substrates Little eddy current is induced.

       Toroidal geometry have optimal electromagnetic characteristics


    Toroidal inductor 5
    Toroidal Inductor [5]

    • p=100㎛

    • t=8.3㎛

    • w=70㎛

    • r=440㎛

    • a=170㎛

    • hs=500㎛

    • hox=0.5㎛

    • N=15


    Continued5
    Continued

    • Post-processing technology for monolithically ICs

    • Fabrication without requiring changes to the silicon process

    • Surface micromachining technology

    • Confining the magnetic fields

    • Optimize the tradeoff between flux linkage and turn-to-turn parasitic capacitance

    • For the same inductance, toroidal structures consume significantly less area

    • A concentrated magnetic field along the core results in less noise coupling and electromagnetic interference with the neighboring components


    Continued6
    Continued

    Si sub 20Ωcm, 500㎛ thickness

    (a) Input output lead lines patterning

    (b) Silver – seed layer for electroplating

    (c) Thick PR deposition

    (d) anchoring pints patterning

    (e) gold gold/palladium layer deposition

    (f) suspended metal bridge patterning

    (g) PR removing and metal thickening by electroplating copper and gold


    Continued7
    Continued

    • Micromachined implementation of the toroidal inductor

    • Low resistivity silicon wafer

    • Q Factor: 22(At 1.5GHz)

    • L=2.45nH

    • self–resonant freq. > 10GHz

    • 11 Turns


    Toroidal inductor 6

    Dout=Outer diameter of the coil

    δskin=Skin depth

    μ0=Vacuum permeability, μr=relative permeability,

    N=Number of turns, rcoil=radius of the coil

    rtorus=radius of the torus cross section

    α(f) = current crowding effect coefficient

    ρ = resistivity, Scoil = seperation between coils

    Toroidal Inductor [6]


    Continued8

    Copper

    Gold

    Continued

    Freq.=1GHz

    2rtorus/Dout=0.2

    Gold Thickness=8㎛

    L=5nH

    Freq.=0.9GHz

    Dout=1mm,

    Scoil=15㎛

    Metal Thickness=8㎛

    L=5nH


    Continued9
    Continued

    • Using polymer replication processes accuracy and small features available + production economy


    Continued10
    Continued

    • 6.0nH Inductance, Q Factor 50 (freq.: 3GHz)

    This implementation is not intended

    for direct integration with RF ICs

    Metal Thickness = 4㎛, 15 turns


    Summary
    Summary

    • RFIC requires high performance on chip inductor for small size, low cost, high performance.

    • For high Q inductor, we must reduce ohmic loss and induced current.

    • To reduce the induced current, suspended spiral inductor, 3D solenoid inductor and 3D toroidal inductor were suggested.

    • With the increase of the suspended heights, the maximum Q factor increases gradually.

    • 3D inductors have significantly less eddy current induced substrate loss since the core center is in the direction parallel to the substrate.

    • 3D inductors have less substrate parasitic capacitance since only partial parts of the coil are facing or touching the substrate.

    • In toroidal inductor design, most of the electromagnetic field is concentrated inside the torus. Thus higher Q and lower interference with surrounding circuits can be achieved.


    References
    References

    [1] Xi-ning Wang, “Fabrication and Performance of a novel suspended RF spiral inductor” IEEE Tran. On Electron Devices, Vol. 51, No. 5, May. 2004.

    [2] D. J. Young, “Monolithic high-performance three-dimensional coil inductors for wireless communication applications” Int. EDM 97, 1997, pp 67-70

    [3] N.Chomnawang, “On-chip 3D air core micro-inductor for high-frequency applications using deformation of sacrificial polymer” Proc. SPIE, Vol. 4334, pp. 54-62, 2001

    [4] J.B.Yoon, “Surface micromachined solenoid on-Si and on-glass inductors for RF applications” IEEE Electron Device Lett., Vol. 20, pp 487-489, Sep. 1999.

    [5] Wai Y. Liu, “Toroidal inductors for radio-frequency Integrated Circuits” IEEE Tran. On Microwave Theory and Techniques, Vol. 52, No2, Feb. 2004.

    [6] Vladimir Ermolov, “Microreplicated RF toroidal inductor” IEEE Tran. On Microwave Theory and Techniques, Vol. 52, No. 1, Jan. 2004.