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A distributed software-centric architecture for reconfigurable embedded systems. Krzysztof Kępa BIRC Group Electronic Eng. Dept. National University of Ireland Galway. Schloss Dagstuhl, 22-24 November 2006. Overview. Reconfigurable Computing FPGA-based RC in a nutshell Research in RC
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A distributed software-centric architecturefor reconfigurableembedded systems Krzysztof Kępa BIRC Group Electronic Eng. Dept. National University of Ireland Galway Schloss Dagstuhl, 22-24 November 2006
Overview • Reconfigurable Computing • FPGA-based RC in a nutshell • Research in RC • Research in NUI Galway • Discussion Schloss Dagstuhl, 22-24 November 2006
Reconfigurable Computing Computer processing with highly flexiblecomputingfabrics Goal: software flexibility with hardware performance • GPPs can execute any software, but performance can be slow • ASICs can execute only one application, but quickly • Reconfigurable computing seeks to bridge this gap • Reconfiguration allows same hardware to execute multiple applications • Executing application in hardware leads to higher performance than in software Microprocessors Reconfigurable Computing ASICs Highest flexibility Performance? High flexibility High performance Highest performance Lowest flexibility Schloss Dagstuhl, 22-24 November 2006
FPGAs in RC When is it most apropriate to consider FPGA usage? • remove dependence from ASIC device fabrication • provide massive flexible resource and parallelism What elements of FPGAs are attractive in developing reconfigurable embedded systems? • embedded hard/soft processors • distributed and Block RAM • increased logic density • increased IP libraries • partial run-time reconfigurability • increased speed • target low power Schloss Dagstuhl, 22-24 November 2006
RC/FPGA in a nutshell Applications • Software Defined Radio • Robotics • Prototyping • Integration • Rapid development in protocols, standards, algorithms, architectures • Signal&Image processing Schloss Dagstuhl, 22-24 November 2006
Advantages Programmability Flexibility to the designer Time-multiplexed apps Fault tolerance Increased productivity Small to medium volume RC/FPGA in a nutshell • Challenges • Programming transparency • Hardware virtualization • Need for constrained HW/SW partitioning tools • Performance • Reliability • Power • Area Schloss Dagstuhl, 22-24 November 2006
Current research in RC Key enabling technologies to RC • Platform-based design • Research Accelerator for Multiple Processors (RAMP), BEE2 Berkeley • CRAY XD1, SGI RASC, Nallatech, Starbridge, ... • Run-time system assembly (dynamic reconfiguration) • PR Tool – Xilinx • Sonic-on-Chip – Sedcole, Imperial College, London - http://cas.ee.ic.ac.uk/people/nps/ • Inter-module communication models (NoPC) • packet switched – Bobda, TU Kaiserslautern • circuit switched – Hilton, UA Tucson http://ieeexplore.ieee.org/iel5/10158/32467/01515721.pdf?arnumber=1515721 Schloss Dagstuhl, 22-24 November 2006
Current research in RC • Software abstraction of Reconfigurable Hardware • VirtualFS (XVFS) • Xilinx –RTL-level model (properitary) http://www.elis.ugent.be/FCH/Handouts/Donlin.pdf • Transparent HW management in Linux kernel • Current work in NUI Galway – K.Kościuszkiewicz, F.Morgan, K. Kępa http://dx.doi.org/10.1109/ISVLSI.2006.90 • Design tools & flow • HLL C-like synthesis tools • HardwareC, SystemC, Handel-C, etc • Architecture modelling • OCAPI – IMEC - http://www.imec.be/ocapi • OS support for embedded systems • Embedded Next Generation GNSS Platform – F.Engel - NICTA • L4 microkernel (Liedtke) - Karlsruhe, Dresden http://www.ertos.nicta.com.au Schloss Dagstuhl, 22-24 November 2006
Research in NUI Galway FPGA-related expertise • Reconfigurable digital platforms • Virtex II Pro, Virtex 4 - Xilinx • Embedded processors • PicoBlaze • Microblaze • PowerPC • Linux kernel integration • uCLinux • EDA Toolsuites • Xilinx ISE/EDK • Modelsim • Digital signal & image processing • M.Sc. Thesis • LCAOS - Adaptive Optics Group Schloss Dagstuhl, 22-24 November 2006
Execute (Subtract) Read (Subtract) Program (pico0) Research in NUI Galway Project: Transparent RHw management in SoPCs • Software abstraction of RHw resources • Implemented in Linux kernel Schloss Dagstuhl, 22-24 November 2006
Research in NUI Galway Project: A distributed software-centric architecture for reconfigurableembedded systems Goals: • Framework development • SoPC model extension - Multi-node approach • Each node incorporates: • embedded processor + associated microkernel • reconfigurable elements (hardware or processor-based) • interface and communication units • Node/HW/SW code partitioning Schloss Dagstuhl, 22-24 November 2006
Efficient application of software-oriented hardware design methodology Techniques for constrained code partitioning and hw/sw co-design Inter-module communication models (distributed and SoPC/NoPC) Software abstraction models for reconfigurable hardware Research ideas User space Distributed OS TCB Schloss Dagstuhl, 22-24 November 2006
Any suggestions? Summary Reconfigurable Computing FPGA-based RC in a nutshell Research in RC Research at NUI Galway Ideas to discuss Discussion Schloss Dagstuhl, 22-24 November 2006
Thank you! Questions? A distributed software-centric architecturefor reconfigurableembedded systems Krzysztof.Kepa@pwr.wroc.pl BIRCGroup http://www.birc.nuigalway.ie Electronic Engineering Dept. http://www.ee.nuigalway.ie NUI Galway http://www.nuigalway.ie
BIRC Bio-Inspired ad Reconfigurable Computing Group in NUI Galway • Current research in BIRC • Reconfigurable Computing • Bio-Inspired • Video processing & Control Systems (Adaptive Optics) • Team • Academic staff : Dr Fearghal Morgan, John Maher • P/G researchers : Brian Mc Ginley, Patrick Rocke, Colin Mullaney, Krzysztof Kościuszkiewicz, Krzysztof Kępa, Shane Lynch
BIRC Reconfigurable Computing • Inspiration Best of both worlds: runtime flexibility of general purpose processors and ultimate performance of parallel hardware. • Mission Statement Investigate and develop means of interactions between distributed dynamically reconfigurable hardware and software components. • Aims • Enable transparent reconfiguration and hardware virtualization for distributed embedded systems • Use dynamic reconfiguration for runtime power/performance ratio optimization • Adapt to existing software (OS) ecosystem, avoid „NIH” syndrome • Develop design tools and models for reconfigurable systems that offer hardware/software transparency in development stage
BIRC Bio-Inspired & AO • Bio-Inspired Electronics • Evolvable Hardware Platforms and Architectures • Evolution for Autonomous Systems. • Developmental Algorithms • Fault Detection and Recovery • Adaptive Optics • Low-cost Adaptive Optics Control System
Pub… Quay St., Galway Ireland & Galway Roman Catholic Cathedral Renvyle, Mayo Co. Lower Corrib, Galway Kylemore Abbey, Mayo Co.