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Chapter 3-Webster Amplifiers and Signal Processing

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Chapter 3-Webster Amplifiers and Signal Processing. Applications of Operational Amplifier In Biological Signals and Systems. The three major operations done on biological signals using Op-Amp: Amplifications and Attenuations DC offsetting: add or subtract a DC

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### Chapter 3-WebsterAmplifiers and Signal Processing

• The three major operations done on biological signals using Op-Amp:
• Amplifications and Attenuations
• DC offsetting: add or subtract a DC
• Filtering:Shape signal’s frequency content
Ideal Op-Amp

Most bioelectric signals are small and require amplifications

Figure 3.1 Op-amp equivalent circuit.The two inputs are 1 and 2. A differential voltage between them causes current flow through the differential resistance Rd. The differential voltage is multiplied by A, the gain of the op amp, to generate the output-voltage source. Any current flowing to the output terminal vo must pass through the output resistance Ro.

Inside the Op-Amp (IC-chip)

20 transistors

11 resistors

1 capacitor

Ideal Characteristics

1- A =  (gain is infinity)

2- Vo = 0, when v1 = v2 (no offset voltage)

3- Rd =  (input impedance is infinity)

4- Ro = 0 (output impedance is zero)

5- Bandwidth =  (no frequency response limitations) and no phase shift

Two Basic Rules

Rule 1

When the op-amp output is in its linear range, the two input terminals are at the same voltage.

Rule 2

No current flows into or out of either input terminal of the op amp.

o

10 V

i

-10 V

10 V

Rf

i

i

Slope = -Rf / Ri

Ri

-

i

o

-10 V

+

(b)

(a)

Inverting Amplifier

Figure 3.3 (a) An inverting amplified. Current flowing through the input resistor Ri also flows through the feedback resistor Rf . (b) The input-output plot shows a slope of -Rf / Ri in the central portion, but the output saturates at about ±13 V.

Summing Amplifier

Rf

R1

1

-

R2

o

2

+

Example 3.1

The output of a biopotential preamplifier that measures the electro-oculogram is an undesired dc voltage of ±5 V due to electrode half-cell potentials, with a desired signal of ±1 Vsuperimposed. Design a circuit that will balance the dc voltage to zero and provide a gain of -10 for the desired signal without saturating the op amp.

+10

Rf

Ri

i

100 kW

10 kW

i

-

i + b /2

+15V

Rb

o

0

Voltage, V

20 kW

Time

5 kW

+

v

b

-15 V

-10

o

(a)

(b)

Follower ( buffer)

Used as a buffer, to prevent a high source resistance from being loaded down by a low-resistance load. In another word it prevents drawing current from the source.

-

o

i

+

Noninverting Amplifier

o

i

i

10 V

Rf

Ri

Slope = (Rf + Ri )/ Ri

-10 V

10 V

i

-

o

-10 V

i

+

Differential Amplifiers

Differential Gain Gd

R4

R3

v3

R3

v4

vo

Common Mode Gain Gc

For ideal op amp if the inputs are equal then the output = 0, and the Gc =0. No differential amplifier perfectly rejects the common-mode voltage.

R4

Common-mode rejection ratio CMMR

Typical values range from 100 to 10,000

Disadvantage of one-op-amp differential amplifier is its low input resistance

Instrumentation Amplifiers

Differential Mode Gain

Advantages: High input impedance, High CMRR, Variable gain

+15

R1

ui

-

v2

uo

R1

uref

+

-15

R2

uo

10 V

-10 V

uref

ui

-10 V

Comparator – No Hysteresis

v1 > v2, vo = -13 V

v1 < v2, vo = +13 V

If (vi+vref) > 0 then vo = -13 V else vo = +13 V

R1 will prevent overdriving the op-amp

uo

R1

With hysteresis

10 V

ui

-

uo

-10 V

R1

10 V

uref

+

- uref

ui

R2

R3

-10 V

Comparator – With Hysteresis

Reduces multiple transitions due to mV noise levels by moving the threshold value after each transition.

Width of the Hysteresis = 4VR3

o

10 V

R

D1

D2

-10 V

10 V

(1-x)R

xR

i

-

-10 V

i

+

(b)

R

i

D4

o=

x

D3

-

+

(a)

Rectifier

xR

(1-x)R

v

o

D2

-

+

i

(a)

Full-wave precision rectifier:a) For i > 0, D2 and D3 conduct, whereas D1 and D4 are

reverse-biased.Noninverting amplifier at the top is active

o

10 V

R

D1

D2

-10 V

10 V

(1-x)R

xR

i

-

-10 V

i

+

R

(b)

i

D4

o=

x

D3

-

+

(a)

Rectifier

xRi

R

i

v

o

D4

-

+

(b)

Full-wave precision rectifier:b) For i < 0, D1 and D4 conduct, whereas D2 and D3 are reverse-biased. Inverting amplifier at the bottom is active

Ri = 2 kW

Rf = 1 kW

i

v

o

D

-

RL = 3 kW

+

(c)

One-Op-Amp Full Wave Rectifier

For i < 0, the circuit behaves like the inverting amplifier rectifier with a gain of +0.5. For i > 0, the op amp disconnects and the passive resistor chain yields a gain of +0.5.

Rf/9

Ic

Rf

Ri

-

i

o

+

(a)

Logarithmic Amplifiers

• Uses of Log Amplifier
• Multiply and divide variables
• Raise variable to a power
• Compress large dynamic range into small ones
• Linearize the output of devices

VBE

Figure 3.8 (a) A logarithmic amplifier makes use of the fact that a transistor's VBE is related to the logarithm of its collector current. For range of Ic equal 10-7 to 10-2 and the range of vo is -.36 to -0.66 V.

v

o

10 V

-10 V

10 V

i

1

-10 V

10

(b)

Logarithmic Amplifiers

VBE

Rf/9

Ic

VBE

9VBE

Rf

Ri

-

i

o

+

(a)

Figure 3.8 (a) With the switch thrown in the alternate position, the circuit gain is increased by 10. (b) Input-output characteristics show that the logarithmic relation is obtained for only one polarity; 1 and 10 gains are indicated.

Integrators

for f < fc

A large resistor Rf is used to prevent saturation

Integrators

Figure 3.9 A three-mode integrator With S1 open and S2 closed, the dc circuit behaves as an inverting amplifier. Thus o = ic and o can be set to any desired initial conduction. With S1 closed and S2 open, the circuit integrates. With both switches open, the circuit holds o constant, making possible a leisurely readout.

R

is

C

-

dqs/ dt = is = K dx/dt

uo

isC

isR

+

FET

Piezo-electric

sensor

Example 3.2

The output of the piezoelectric sensor may be fed directly into the negative input of the integrator as shown below. Analyze the circuit of this charge amplifier and discuss its advantages.

isC = isR = 0

vo = -vc

Long cables may be used without changing sensor sensitivity or time constant.

Differentiators

Figure 3.11 A differentiator The dashed lines indicate that a small capacitor must usually be added across the feedback resistor to prevent oscillation.

Active Filters- Low-Pass Filter

Cf

Rf

Ri

Gain = G =

-

ui

uo

+

(a)

|G|

Rf/Ri

0.707 Rf/Ri

freq

fc = 1/2RiCf

Active filters(a) A low-pass filter attenuates high frequencies

Active Filters (High-Pass Filter)

Rf

Ci

Ri

-

ui

uo

Gain = G =

+

(b)

|G|

Rf/Ri

0.707 Rf/Ri

freq

fc = 1/2RiCf

Active filters(b) A high-pass filter attenuates low frequencies and blocks dc.

Active Filters (Band-Pass Filter)

Cf

Ci

Rf

Ri

-

ui

uo

+

|G|

(c)

Rf/Ri

0.707 Rf/Ri

freq

fcL = 1/2RiCi

fcH = 1/2RfCf

Active filters(c) A bandpass filter attenuates both low and high frequencies.

Frequency Response of op-amp and Amplifier

Open-Loop Gain

Compensation

Closed-Loop Gain

Loop Gain

Gain Bandwidth Product

Slew Rate

Offset Voltage and Bias Current

Read section 3.12

Nulling, Drift, Noise

Read section and 3.13

Differential bias current, Drift, Noise

-

Ro

uo

Rd

ud

ii

+

io

Aud

-

ui

RL

+

CL

Input and Output Resistance

Typical value of Ro = 40 

Typical value of Rd = 2 to 20 M

+

-

+

-

Phase Modulator for Linear variable differential transformer LVDT

+

-

+

-

Phase Modulator for Linear variable differential transformer LVDT

Phase-Sensitive Demodulator

Used in many medical instruments for signal detection, averaging, and Noise rejection

The Ring Demodulator

If vc is positive then D1 and D2 are forward-biased and vA = vB. So vo = vDB

If vc is negative then D3 and D4 are forward-biased and vA = vc. So vo = vDC

vc 2vi