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14_1_2_Introduction_Switched_Capacitor_Circuits

VLSI design

Dr239
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14_1_2_Introduction_Switched_Capacitor_Circuits

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  1. Introduction to Switched- Capacitor Circuits Sections 14.1 & 14.2

  2. Integrated Circuit Capacitors Chapter 14 Figure 1 Parasitic capacitances associated with an integrated circuit capacitor are often no symmetric, as indicated by the schematic symbol above

  3. CMOS Switches Chapter 14 Figure 2: Switch symbol and some transistor circuits: (a) symbol, (b) n-channel switch, (c) p–channel switch, (d) transmission gate.

  4. Basic Switched Capacitor Chapter 14 Figure 4: Resistor equivalence of a switched capacitor. (a) Switched-capacitor circuit, and (b) resistor equivalent.

  5. Example • C1 = 5pF, fs = 100kHz Req = 1/(5e12*100e3) = 2MW!! • Very large value • Controllable by changing the clock frequency

  6. Non-overlapping clocks • Must avoid the situation where both switches are closed simultaneously

  7. Simple Switched-Capacitor Integrator (not used)

  8. Simple Switched-Capacitor Integrator (not used)

  9. Simple Switched-Capacitor Integrator (not used)

  10. Simple Switched-Capacitor Integrator (not used) • Integrator gain depends upon ratio of capacitor values • Operation is analogous to a continuous-time active RC integrator with respect to input frequencies >> fs

  11. Practical integrated circuit capacitors • Parasitics Cp1,2 are not well controlled and are difficult to predict

  12. Impact of parasitics on the integrator • Gain is no longer accurate & well controlled

  13. (Noninverting) Delayed Switched-Capacitor Integrator

  14. (Noninverting) Delayed Switched-Capacitor Integrator

  15. (Inverting) Delay-Free Switched-Capacitor Integrator

  16. (Inverting) Delay-Free Switched-Capacitor Integrator

  17. (Inverting) Delay-Free Switched-Capacitor Integrator

  18. Signal Flow Graph Analysis

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