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Z ero D elay (Clock) B uffers NB230XA series

Z ero D elay (Clock) B uffers NB230XA series. ON made a backend processing change requiring a PCN to be issued. Standardizing all products in industrial temp only and lead free only. A design change was made to correct an application issue. Why ON is Re-launching the Zero Delay Buffers?.

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Z ero D elay (Clock) B uffers NB230XA series

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  1. Zero Delay (Clock) BuffersNB230XA series

  2. ON made a backend processing change requiring a PCN to be issued. Standardizing all products in industrial temp only and lead free only. A design change was made to correct an application issue Why ON is Re-launching the Zero Delay Buffers?

  3. All OPNs made active by Feb. 2008 Consolidated all commercial temperature range OPNs into industrial temperature range OPNs. All NB230xA OPNs are designated with an "I" for industrial temp range. The ZDB datasheets are updated to say that the NB230xA ZDBs are guaranteed to operate across commercial AND industrial temperature ranges. PCN #15741 effective in July 2007 FPCN #16086 effective in Jan. 2008 NB230xA Zero Delay Buffers

  4. Product Change Notification Change Notification: # 15741  Type of Notification: INITIAL PRODUCT/PROCESS CHANGE NOTIFICATION Change Title: Initial Notification for PulseCore to ON Semiconductor Zero Delay Buffer Backend Processing Issue Date: 2007-03-09 Affected Product FamilyDescription: ON Semiconductor will be converting the PulseCore Zero Delay Buffer product line from a Buy/Sell to a Make/Sell process. This process change will enable ON Semiconductor to perform the assembly and test process steps for these products. The backend processing will be performed at the ON Semiconductor OSPI facility in Carmona Philippines. This process change will not affect the electrical datasheet parameters or specifications. Key Items Affected by Change: From a Buy/Sell to a Make/Sell Packaging Process  Key Milestones: Effective Date: 2007-07-09 PCN #15741

  5. Product Change Notification Change Notification: # 16086 RevisionType of Notification: FINAL PRODUCT/PROCESS CHANGE NOTIFICATION Change Title: Final Notification for ON Semiconductor Zero Delay Buffer Backend Processing Issue Date: 2008-01-08 Affected Product FamilyDescription: This is the FPCN to IPCN 15741 available at www.onsemi.com ON Semiconductor will be manufacturing backend assembly and test process for the Zero Delay Buffer products. Electrical datasheet parameters and specifications will not change. This qualification will allow ON Semiconductor to meet the increasing demand for these types of devices. During the qualification, a design fix was implemented to prevent a potential problem with customer applications operating between a 15 and 30 MHz frequency range. Product with a date code of 0743 or later represents the design tweak. Prior inventory was purged. The backend processing will be performed at the ON Semiconductor OSPI facility in Carmona Philippines. Key Items Affected by Change: Backend Packaging Process  Key Milestones: Effective Date: 2008-04-08 FPCN# 16086

  6. NB2308A Zero Delay Buffer (ZDB) - Description • A device that fans out one clock signal and drives multiple clocks signals • Built with a PLL (see diagram) • Accepts one External Reference Clock Input and a Feedback Input • Feedback Input pin is typically driven by one of the Outputs • PLL synchronizes the REF input with the Feedback input while maintaining effectively “zero” delay between the REF input and the outputs (Feedback) • The phase detector adjusts the output frequency of the VCO so that its two inputs have no phase or frequency difference • Provides an output synchronous to the Reference input • Maintains minimal output-to-output skew PLL

  7. • High Performance : 133MHz • Low skew : 250ps max output-to-output skews • Fast output edge rate : ≤1.5ns • REF to CLKOUT Propagation Delay : 0ps typ., +/-350ps max • Operating Temperature Ranges: Industrial (-40º C to +85º C) • Voltage supply: 3.3V power supply • Packaged in 16-pin SOIC and TSSOP (2308/09); or 8-pin SOIC (2304) and TSSOP (2304/05) Pb-free By connecting the CLKOUT output to the feedback FBK input (2304/08), the propagation delay from the REF input to any clock output will be nearly zero. A big advantage of the NB230xA is that they allow the system designer to adjust or move the output clocks forward or backward in time with respect to the reference clock, to fine-tune a design. The PLL buffer needs a reference clock from the main system. It then generates 4 or 8 clock signals with zero delay compared to the reference clock. The system only needs to provide one clock signal, which greatly reduces the number of clock signals generated (minimize EMI). Key Features

  8. Zero-Delay Buffers Solve Clock Problems ON Semiconductor’s line of Zero-Delay Buffers eliminate clock-propagation delays and allow clock distribution with up to 9 outputs. ZDB’s also allow the designer to compensate for propagation delays and output-to-output skew mismatches that are caused by variations in trace length and capacitive loading on printed-circuit-board interconnects. Markets and End Equipment • Memory Array • Storage Area Networks • Network Attached Storage • Servers / Workstations • Networking / Telecom • Routers, Gateways, Switches • Base Stations • Line Cards • Set Top Box • DVR / Digital TV

  9. Clock distribution applications. High-speed motherboard applications, including those using 133-MHz SDRAM Memory clock module trees where parallel SDRAMs require idnetical clocks. They also function in applications requiring multiple low-skew clocks that are phase-matched to a reference clock. DIMM or PCI bus clocking High performance Phase-Lock Loop Clock Distribution for 100/133 MHz Registered DIMM Synchronous DRAM modules for server/workstation/PC applications Networking applications such as Switched Ethernet, PLL drivers are used to de-skew the delay through large clock buffers. Applications where the system designer needs large multiple clock signals that are in complete sync with a reference clock. Used to de-skew the delay through large clock trees. Significantly large memory arrays need this clocking scheme. NB230xA Applications

  10. 2308A 2309A REF 1 16FBK CLKA12 15 CLKA4 CLKA23 14 CLKA3 VDD 4 13 VDD REF 1 16CLKOUT CLKA12 15 CLKA4 CLKA23 14 CLKA3 VDD 4 13 VDD 2304A 2305A REF 18FBK CLKA12 7 VDD CLKA23 6 CLKB2 GND 4 5 CLKB1 REF 18CLKOUT CLK22 7 CLK4 CLK1 3 6 VDD GND 4 5 CLK3 GND 512GND CLKB16 11 CLKB4 CLKB27 10 CLKB3 S2 8 9 S1 GND 512GND CLKB16 11 CLKB4 CLKB27 10 CLKB3 S2 8 9 S1 NB230xA SOIC/TSSOP-8 & -16 Pinouts

  11. Zero Delay Buffer Nomenclature Package Type D= SOIC DT= TSSOP X= 1,1H,2,3,4,5,5H X= 4, 5, 8 or 9 depending on device NB230XAIXD/DTR2G Tape & Reel Product Family NB Pb Free Temperature: Industrial -40 to +85 C

  12. Why are we re-introducing these devices? Due to a backend processing location addition. Is there any difference between the original product and the new released product datasheet electrical specifications? No, there is no difference. Datasheets have been updated with the new ordering nomenclature. Will there be a nomenclature change? Yes, commercial grade temp is being replaced by the industrial temp grade part number and all leaded product is being offered in lead free only. Will this require my customer to requalify? Many customers may choose to re-qual due to a backend change. In many instances it will be a paper qual only. All electrical parameters have been matched. Why was a design change made? Some applications with input frequency between 25-30 MHz range experienced output instability issues. Q&A

  13. When will samples be available? We are accepting sample orders now. How can I get a sample? Samples are to be entered into ProChannel. When will the product be released into production? All products are released into production.** What is the current lead-time for the production product? Current lead time is 4 weeks. How do I know my customer will get the redesigned product? The design change was implemented on product with a date code of 0743 or after. All prior inventory was purged. Where do I go to get competitor cross references? Supplied soft copy of cross reference or to the onsemi.com home page utilizing the cross reference tool. Q&A continued ** exception NB2308AI2HDTG due to release March 2008

  14. Base Part Cross Reference Complete cross reference at end of presentation

  15. Tammy Resh – Marketing Manager Tammy.resh@onsemi.com Casey Stys – Applications Engineer Casey.stys@onsemi.com Contact Information

  16. Re-engage with customers in your region Redirect customers to new Industrial temp and Pb-free OPN Request samples via ProChannel for requalification Identify new customers in your region currently using ZDB’s Utilize cross reference to identify ON Semiconductor ZDB potential Request samples via ProChannel Call To Action Cross reference on following slides

  17. Cross Reference

  18. Cross Reference (con’t)

  19. Cross Reference (con’t)

  20. Cross Reference (con’t)

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