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CSE111: Great Ideas in Computer Science

CSE111: Great Ideas in Computer Science. Dr. Carl Alphonce 219 Bell Hall Office hours: M-F 11:00-11:50 645-4739 alphonce@buffalo.edu. Announcements. Recitations have started this week! You have this week and next to complete HW1. COMMUNICATION students. cell phones off (please). Agenda.

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CSE111: Great Ideas in Computer Science

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  1. CSE111: Great Ideas in Computer Science Dr. Carl Alphonce 219 Bell Hall Office hours: M-F 11:00-11:50 645-4739 alphonce@buffalo.edu

  2. Announcements • Recitations have started this week! • You have this week and next to complete HW1.

  3. COMMUNICATION students

  4. cell phones off (please)

  5. Agenda • Review from last class • two’s complement • underlying hardware • Today’s topics • various circuits

  6. AND gate

  7. OR gate

  8. NOT gate

  9. physical vs. logical perspectives • Physical reality: • Logical view: Carries a HIGH voltage or a LOW voltage WIRE Carries a 1 or a 0 WIRE

  10. Idea

  11. Controlling flow 0

  12. Controlling flow 1

  13. Two in a row? 0

  14. AND gate Output is on right Inputs are on left For which input values is output 1? For which input values is output 0?

  15. OR gate Output is on right Inputs are on left For which input values is output 1? For which input values is output 0?

  16. NOT gate Input is on left Output is on right For which input value is output 1? For which input value is output 0?

  17. Flip-flop (a bit of memory!) R (reset) remembered value S (set)

  18. Setting the flip-flopThe normal value of R and S is zero. R (reset) = 0 remembered value S (set) = 0

  19. Setting the flip-flopTo store 1 in the flip-flop, we “raise” S to 1… R (reset) = 0 remembered value S (set) = 1

  20. Setting the flip-flop…which makes the output of the OR gate 1. R (reset) = 0 remembered value 1 S (set) = 1

  21. Setting the flip-flopThe NOT gate inverts this 1 value to 0, which becomes the second input to the upper OR gate. R (reset) = 0 remembered value 0 1 0 S (set) = 1

  22. Setting the flip-flopSince both inputs of the upper OR gate are zero, its output is zero. R (reset) = 0 0 remembered value 0 1 0 S (set) = 1

  23. Setting the flip-flopThe NOT gate inverts this 0 to a 1; this value becomes the second input to the bottom OR. R (reset) = 0 1 0 remembered value 0 1 1 0 S (set) = 1

  24. Setting the flip-flopBecause the output of the bottom OR gate will now stay at 1, we can lower S to zero, and the circuit will stay in a stable state, with 1 as the remembered value! R (reset) = 0 1 0 remembered value 0 Resetting the flip-flopResetting the remembered value to zero is similar, except we raise, then lower, the value on R. 1 1 0 S (set) = 0

  25. One-bit Half Adder A B S C

  26. One-bit Full Adder A B S Cin Cout

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