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Introduction to microfabrication, chapter 1

Introduction to microfabrication, chapter 1. sami.franssila@aalto.fi. Dimension in microworld. Fig. 1.12. surface. thin film 2. interface 2. thin film 1. interface 1. substrate. Materials. Thin films: 10-1000 nm; SiO 2 (insulator) Al (conductor).

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Introduction to microfabrication, chapter 1

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  1. Introduction to microfabrication,chapter 1 sami.franssila@aalto.fi

  2. Dimension in microworld Fig. 1.12

  3. surface thin film 2 interface 2 thin film 1 interface 1 substrate Materials Thin films: 10-1000 nm; SiO2 (insulator) Al (conductor) Substrate: thick piece of materials (0.5 mm = 500 µm) Silicon most often

  4. Microfabrication vs. Nanofabrication ? Fig. 1.3: Electron beam lithography defined gold-palladium nanobridge Fig. 24.4: Focussed ion beam patterned Aalto vase

  5. Fig. 1.1: Microtechnology subfield evolution from 1960’s onwards.

  6. Silicon microelectronics 0.5 µm CMOS in SEM micrograph 65 nm CMOS in TEM micrograph

  7. MOS transistor Fig. 1.18: Schematic of a MOS transistor: gate, source (S) and drain (D) in an active area defined by thick isolation oxide.

  8. Patterning process: optical lithography and etching Fig. 9.1

  9. Photoresist application Surface preparation for adhesion improvement Spin coating Resist dispensing Acceleration Final spinning 5000 rpm (a few milliliters) (resist expelled) (partial drying via evaporation)

  10. Photoresist exposure Positive AZ resist: Positive resist: exposed parts become soluble Negative resist: exposed parts cross-linked and insoluble

  11. Lithography test structures

  12. gap Contact/proximity lithography λ= 436 nm d = 1 µm (standard resist) Linewidth min ≈ 0.5 µm g = 0 (contact) Linewidth min ≈2 µm g = 10 µm (proximity)

  13. Contact/proximity resolution Vacuum contact Hard contact Soft contact 20 µm proximity gap

  14. Linewidth and pitch The goal of lithography is to make lines and spaces small (only this will increase device packing density). Linewidth on previous slide was actually half-pitch: the resolving power of optical systems was divided half and half for line and space. In making microprocessor gates, line is smaller than space, e.g. 100 nm pitch results in 30 nm gate and 70 nm space.

  15. a b f c e d After lithography • ion implantation (Ch 15) • wet etching (Ch 11) • moulding (Ch 18) • plasma etching (Ch 11) • electroplating (Ch 29) • lift-off (Ch 23)

  16. Apply photofilm Press together Stamp release Residue clearing Imprinting/embossing • Press 3D master into softened polymer • Remove after cooling below Tg

  17. Nanoimprinted Photonic Crystal Devices Silicon stamp: High lateral resolution Protrusion height ~ 100 nm Anders Kristensen

  18. UV nanoimprinting Use light to harden the polymer Apply polymer Stamp+UV Stamp release Residue clearing

  19. Superhydrophobic biomimetic surfaces by UV-NIL Nanotech 2006, Boston

  20. Alignment Microdevices are build layer-by-layer. Alignment is needed to make those structures coincide. Mask and wafer are aligned before exposure Mask with second level structrures Wafer with first level structures

  21. #1 resistor #2 contactsholes #3 metallization Resistor alignment Resistor material patterned Insulation deposited Contach hole lithography & etching Metal deposition

  22. scribe lines for chip dicing edge exclusion alignment marks for lithography wafer flat for orientation checking Silicon wafers Fig. 1.4: 100 mm diameter silicon wafer Fig. 1.20 Real estate allocation on a wafer

  23. Silicon strengths • silicon is a good mechanical material • silicon is good thermal conductor • silicon is transparent in infrared • silicon is a semiconductor • silicon is optically smooth and flat • silicon is known inside out  consider silicon first, alternatives then

  24. Single crystalline silicon(a.k.a. monocrystalline) <100> silicon

  25. Polycrystalline and amorphous materials Fig. 1.6

  26. Other substrates Glass amorphous SiO2 + Na2O + CaO +… Quartz amorphous or crystalline SiO2 Sapphire crystalline Al2O3 Alumina amorphous Al2O3 klk GaAs crystalline GaN crystalline SiC crystalline Steel multicrystalline Nickel multicrystalline AlN multicrystalline ZnO amorphous (“glass”) PCB polymer LTCC ceramic

  27. High temperature processes T > ~ 900oC Thermal oxidation Si + O2 SiO2 Diffusion

  28. 3.5eV 2.2 eV Arrhenius processes

  29. Optoelectronics Fig. 1.14: Silicon solar cell Fig. 6.2: GaAs multiple quantum well solar cell

  30. MOEMS (Micro Opto Electro Mechanical Systems) Fig. 21.4: variable optical attenator Fig. 1.2: Micromirror made of silicon, 1 mm diameter, is supported by 1.2 µm wide, 4 µm thick torsion bars (detail figure), from ref. Greywall.

  31. Micro-optics Fig. 1.7: Aluminum oxide and titanium oxide thin films deposited over silicon waveguide ridges, courtesy Tapani Alasaarela. Fig. 7.13: Refractive index SiO2/SiOxNy/SiO2 waveguide: nf 1.46/1.52/1.46. From ref. Hilleringmann.

  32. MEMS: Micro Electro Mechanical Systems Fig. 29.21: Microgears, courtsey Sandia National Labs. Fig. 21.3: comb-drive actuator

  33. Power MEMS Fabricated by bonding together 5 silicon wafers. Fig. 1.17: Microturbine

  34. Microfluidics and BioMEMS Fig. 1.13: silicon microneedle Fig. 1.11: Oxy-hydrogen burner flame ionization detector

  35. Cleanroom

  36. Yield Yield of a total process is a product of yield of individual process steps 50 step MEMS process Y0 = 0.999  95% 500 step DRAM process, Y0 = 0.999  61%

  37. Yield (2) Yield depends on chip area (A) and defect density (D) D = 0.01 mm-2 (= 1/cm2) A= 10 mm2Y = 90% A= 100 mm2  Y = 37%

  38. Industries Integrated circuits $300 B Other semiconductors $30 B Flat panels displays $100 B Hard disks $30 B Solar cells $30 B MEMS $10 B Equipment $30 B Materials $10 B

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