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Introduction and Concept

Microcontroller design team #0923 Filipe Betzel , Adam Hoffert, tom Narvesen , Zach Skalsky Client: Packet Digital LLC. Advisors: Brian Morlock & Matthew Bitterman. Introduction and Concept. Purpose of our project Get real world experience in ASIC digital design

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Introduction and Concept

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  1. Microcontroller design team #0923 Filipe Betzel , Adam Hoffert, tom Narvesen, Zach SkalskyClient: Packet Digital LLC.Advisors: Brian Morlock & Matthew Bitterman

  2. Introduction and Concept • Purpose of our project • Get real world experience in ASIC digital design • Use same tools as industry engineers • Get practical experience in microprocessor arch. • Learn how to interface hardware and software designed by our group and outside sources • Learn good design practices

  3. Project Requirements • The team will build from scratch three peripherals for an open source processor core using RTL • The three peripherals will be: • UART • SMBUS version 1.0 – verified with 3rd party hardware/software • LCD Interface - Allows uP to interface to LCD screen on Altera DE2 Device Requirements • Implement method of using RAM and ROM for microprocessor • Have general input/output ports for controlling external devices • Device will run compiled C code from a compiler designed for reference controller • RTL will run on commercially available FPGA demo board • Design test applications to demonstrate device operability • Demonstrate stable behavior by executing a program the same way as the reference controller would • Learn the layout and extraction tools well enough to perform at least a partial layout • Develop a real world application for device

  4. Project Requirements (cont.) Final Deliverables: • Source RTL for all core, peripheral and system components • Test programs/simulations demonstrating system operability • Documentation on how to use device • Deliver one functional hardware unit Objectives: • During this project the team will work on developing the following skills • Developing working RTL code • Knowledge of revision control • Knowledge of FPGA design and use • Understanding of digital communication buses • Project management skills • Design for test principles

  5. Development Flow

  6. Software Tools • SmartSVN Revision Control • Lets us save all our code revisions • Incisive • Used to simulate Verilog code • Quartus II • Used for analysis and synthesis • Multiboard • For circuit simulation • Ultiboard • For board layout • MSPGCC • Compiling software for demo processor • CodeBlocks • For developing PC software to interface with demo

  7. System Diagram Altera DE2 FPGA Eval Board MSP430 Core (Opencores.org) MSP430 Peripheral Interface SMBUS UART LCD Interface LCD Screen Our Verilog Demo PCB PC Serial Port

  8. OpenMSP430 • Synthesizable 16 bit MCU written in Verilog • Heart of our project • Building a whole core would be very time consuming – Use open source code • Several choices – picked OpenMSP430 because of documentation, flexibility • Can use open source compiler to build code

  9. Uart • An asynchronous way of sending a byte of data • Data is communicated between two UARTs • Only two wires needed for send/receive • Our UART is full-duplex – can send and receive simultaneously • A UART is used to interface low speed • peripheral devices(ex. Keyboard, mouse)

  10. Transmission scheme

  11. Parts of a UART Baud generator Receiver Transmitter Control block

  12. LCD Interface • Function: • In software an LCD command forces a long wait on the MSP430 because of the setup time for the LCD, preventing the MSP430 from doing useful work. • The LCD Interface will store these instructions and initialize the LCD and execute the instructions after the LCD setup time has pasted. • This will free up the MSP430 to do whatever it wants to. • This can all be done in software, but our solution greatly decreases code complexity

  13. LCD Interface • How it was made: • First, we got the LCD to work with software to make sure we were sending to right signals • Second, we split up the Verilog into a initialization block and a control block. • Next, we used Quartus to dump the code on to the FPGA • Last, we wrote some software to write to our LCD through our UART and through the LCD Interface.

  14. LCD

  15. SMBus Specifications • Standard 2-way serial interface based on I2C • Created by Intel in 1995 • Has bitrate of 10kHz to 100kHz • Used on many components for basic communication • Sensors, regulators, power management, D/A • Over 3000 components listed on DigiKey • Transfers are initiated by master device, slave responds according to commands

  16. SMBus Hardware Graphic taken from http://smbus.org/specs/

  17. SMBus Architecture To MSP430 To PCB Controller Bus Interface SCLK Gen

  18. Demo

  19. PCB

  20. Software – OpenMSP430 Requirements • Handle communication with computer using our designed UART • Display user configurable information on the DE2 board using our designed LCD controller • Communicate with the SMBUS peripherals on our demo board (temperature sensor, LED controller, EEPROM) using our designed SMBUS controller

  21. Software – OpenMSP430

  22. Software – PC interface • A way of demonstrating the functionality of our UART • Allows us to communicate with the OpenMSP430 running on the DE2 • Command line program, written in C, sends and receives data through the serial port

  23. Software – PC interface

  24. Software – PC interface

  25. Design for Test • We want to make sure things work before we start putting them together • Each new module of Verilog has its own folder with test files • Can quickly trace down problems using simulator • Found out that simulator does things differently than Quartus • Spent a lot of time fixing differences

  26. Planned Budget

  27. Actual Budget Semester #1 MSP430 Development kit $20 DE1 Board Supplied by Packet Digital Semester # 2 DE2 Board Supplied by ECE department

  28. Applications • Weather data gathering station: temperature, humidity, wind, etc • Portable measuring devices with LCD screen and PC interface • Processor cooling (using SMBUS temperature sensor and SMBUS fan controller)

  29. Improvements UART • Larger buffer (e.g. 8 bytes) • Parity bit, stop bit, word size, and baud rate configuration registers LCD controller • Configurable LCD size SMBUS • Multibyte reads and writes • Fix output signals register

  30. Summary Victory is Ours • Completed objectives • All peripherals functioning correctly • Demo working correctly on DE2 • Learned about digital design flow • Project management and organization • It has been a very positive learning experience

  31. Signal Strength: 4 Bars

  32. Questions ?

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