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SUCCS. Software for Uniboard / Correlator Control System. UniBoard Application agnostic . Facilitating communication with FPGAs/NiosII firmware. NiosII CPU will run simple “O/S” access FPGA resources via memory-mapped I/O receive commands/send answers UDP/IP over the 1Gbit interface

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Succs

SUCCS

Software for Uniboard / Correlator Control System


Uniboard application agnostic
UniBoard Application agnostic

Facilitating communication with FPGAs/NiosII firmware

  • NiosII CPU will run simple “O/S”

  • access FPGA resources via memory-mapped I/O

  • receive commands/send answers

  • UDP/IP over the 1Gbit interface

  • Choose FreeRTOS

    • tiny (3 files of C-code for multitasking core)

    • free

  • allow commands from any host

    • fail-safe access control too complex, added value effectively 0

  • Starting development now


Uniboard application agnostic1
UniBoard Application agnostic

Facilitating communication with FPGAs/controlling host

  • registermap of the NiosII/FPGA personality

    • defines location and size of a register

      • bit + byte adressable fields

  • supplies high-level access to registers

    • read/write/rmw + wait-for-pps

      • Jonathan’s design document contains specification

  • very strict - a big hoorah for Erlang!

    • only allow to write values that “fit” in a field

    • unforgiving error detection on responses

  • includes UDP-enabled emulator

    • interprets and executes the commands on memory

  • done - no gui


UniBoard

UniBoard

CH 0

CH 0

CH n

CH m

DS 0

DS k

OutputFPGA

OutputFPGA

InputFPGA

InputFPGA

Dechannelizer

MySQL

ControlSW

Model

Server

OUTPUT

VEX

ROTClock

n channels

Dechannelizer

.

.

.

.

.

.

.

.

.

.

.

.

.

.

.

.

.

.

m channels


Evn correlator app specific
EVN Correlator App specific

Single channel VDIF input

  • translate existing dataformats to this subset of VDIF

    • Mk5A (MkIV tape-format-on-a-disk), Mk5B, multi-channel VDIF

    • recoding requires fast bit-manipulation S/W

      • reference implementation in Erlang (done)

        • slow, very strict, produces correct output

      • python program generating optimized C version (50%)

        • verified for one tracklayout

        • primarily to ascertain feasability running on commodity hardware

    • development halted since nobody accepts VDIF

      • data must first be shown to correlate


Evn correlator app specific1
EVN Correlator App specific

Correlation driven from database

  • observing parameters seeded from VEX file

    • map VEX to SQL schema (80% done)

    • use official (yacc) grammar to build Erlang parser (done)

      • needs lexer and rule-based code to take appropriate action (0%)

    • accomodate updated versions of parameters (50%)

  • full database schema must include

    • logging/accountability (10%)

    • non-VEX parameters like e-VLBI settings

  • intelligent tools for manipulating the database (0%)

  • waiting for database server ...


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