1 / 276

電源 IC 與電路設計 【Lab】

電源 IC 與電路設計 【Lab】. 實習相關原理. 江炫樟. sjchiang@nuu.edu.tw. 國立聯合大學電機系. Contents. Buck, Boost, Buck-Boost Converters Voltage-Mode Control Peak Current-Mode Control Flyback Adapter LED Driver CCFL Inverter Photovoltaic (PV) Charger. 進度.

windyq
Download Presentation

電源 IC 與電路設計 【Lab】

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. 電源IC與電路設計【Lab】 實習相關原理 江炫樟 sjchiang@nuu.edu.tw 國立聯合大學電機系

  2. Contents • Buck, Boost, Buck-Boost Converters • Voltage-Mode Control • Peak Current-Mode Control • Flyback Adapter • LED Driver • CCFL Inverter • Photovoltaic (PV) Charger

  3. 進度

  4. Power Electronics: Converter, Applications and Design N. Mohan, T. M. Undeland and W. P. Robbins Wiley (電力電子學，江炫樟編譯，全華書局) Switching Power Supply Design Abrahan I. Pressman Mcgraw-Hill Inc. Fundamental of Power Electronics Robert W. Erickson Kluwer Academic Publisher (KAP) Unitrode Seminar Data Sheets of Related Power Management ICs References References

  5. DC-DC Basic Topologies of Switching-mode DC-DC Converters • Buck-Boost Converter (Step-down and Step-up) • Buck Converter (Step-down) • Bridge Converter (4 quadrants) • Boost Converter (Step-up)

  6. DC-DC Basic Topologies of Switching-mode DC-DC Converters With Isolation • Flyback Converter (buck-boost derived) • Full-bridge Converter (buck derived) • Forward Converter (buck derived) • Current-fed Converter (boost derived) • Push-Pull Converter (buck derived)

  7. Buck Converter PWM (Pulse Width Modulation) • Duty ratio • Second-order low-pass filter

  8. Buck Converter B2 B1 Buck Converter • Continuous Conduction Mode Balance of voltage-second A = B

  9. Buck Converter • Boundary condition • For constant Vd at D = 0.5 • For constant Vo at D = 0

  10. Buck Converter • Discontinuous Conduction Mode (DCM) • For constant Vd • For constant Vo

  11. Design of Output Filter Designed with boundary condition at minimum load (Io=IoB) to ensure continuous conduction mode at any load L For High ESR C Voltage ripple due to Ro (ESR) 大小由電容材質決定 典型30~80×10-6

  12. Buck Converter • Output voltage ripple (CCM) For Low ESR

  13. Capacitor Design with Voltage Regulation (Low ESR) DVo DPo + Vo - C

  14. Buck Converter Capacitors Conventional • Aluminum electrolytic • Tantalum • Ceramic New • Solid polymer aluminum (SPA) • Aluminum with an organic electrolyte (OS-CON) • Tantalum with organic electrolyte (POSCAP)

  15. Boost Converter Boost Converter A • CCM B Output voltage Output voltage ripple

  16. Boost Converter Steady-state Equivalent-circuit Model (including RL)

  17. Boost Converter Steady-state Equivalent-circuit Model (including RL)

  18. Boost Converter Output Voltage VS. Duty Cycle

  19. Boost Converter Efficiency VS. Duty Cycle

  20. Boost Converter • Boundary condition At D = 0.5 At D = 0.333

  21. Boost Converter • Discontinuous Conduction Mode

  22. Buck Boost Converter Buck-Boost Converter • Continuous Conduction Mode Output voltage Output voltage ripple

  23. Buck Boost Converter • Boundary condition At D=0 At D=0

  24. Buck Boost Converter • Discontinuous Conduction Mode

  25. Voltage-mode Control Compensator Design of Error Amplifier for Voltage-Mode Control • Fundamental of Bode Plot One Zero Two zeros One zero One Pole Two Poles One zero : the phase will lead 90o finally (+90o) One pole : the phase will lag 90o finally (-90o) -1 slope = -20dB/decade

  26. A More Accurate Bode Plot Pole Zero

  27. Two-pole low-pass filter with high Q RHP Zero 0 90 180 fo fb fa

  28. Voltage-mode Control Loop Gain dB degree -60 -100 -140 -180 Close-Loop Design Criterion Loop Gain should satisfy: • The total phase shift at the crossover frequency (0 dB point) is less than 360o • The gain slope as it pass through the crossover frequency should be –1 • Provide the desired phase margin 45o~60o

  29. Voltage-mode Control LC-Filter + Vo - + Voi - Sampling VFB R2 Rs1 R1 vcon Rs2 Error-Amp PWM+Converter Modeling of Converter and Feedback Controller Design

  30. Voltage-mode Control Vi Gain of PWM Converter PWM+Converter Vt Vcon Vi Voi Ton Ts Sampling

  31. Voltage-mode Control Gain Characteristics of LC-Filter • Low ESR • With ESR

  32. Voltage-mode Control Type II Error Amplifier Design (For C with High ESR) • Set the crossover frequency Fco at 1/4 ~ 1/5 switching frequency (usually Fesr is lower than Fcoso the gain curve will be at –1 slope region) • Choose the error amplifier gain at Fco to be equal and opposite in dB to Gt = (Glc+Gpwm+Gs) • Fp is selected to prevent high frequency noise • Fz and Fp are designed based on K-factor method to satisfy the phase margin • K = Fco/Fz= Fp/Fco

  33. Voltage-mode Control 8. K C1 and C2 K-Factor Design 6. Assign R1 and obtain R2 K is obtained by phase margin: 7.

  34. Voltage-mode Control Phase lag • Phase lag of type II error Amp Fp FZ 180o from the inversion 90o from the pole at origin • Phase lag through an LC filter at Fco :

  35. Voltage-mode Control Example Vi = 20.0V Vo = 5.0V Ion(nominal) = 5A Io(min) = 1A Switching frequency = 100KHz Vt = 3V, Vref=2.5V Minimum output ripple DV(p-p) = 50mV

  36. Voltage-mode Control 30 Fz Fp 20 Gt = Glc+Gm+Gs Fo 10 Fco 0 1k 100k 10k 10 100 Fesr -10 -20 -30 -40 Choose Fco=100K/5=20KHz Gt(Fco)=-28dB, so the error amplifier gain at Fco is +28dB(=25) Let R1=1KW then R2=25KW Assume 45o phase margin The total phase shift around 20KHz is 360-45=315o K=3 is chosen The phase of error amplifier is 315-97=218o The phase lag for LC is 97o Fz=20K/3=6.7K Fp=20Kx3=60K

  37. Voltage-mode Control PSIM Simulation

  38. Voltage-mode Control Simulation Results

  39. Voltage-mode Control Type III Error Amplifier (For C with low ESR) • Design criterion is the same as the Type II • K-factor can be employed 1 pole

  40. Voltage-mode Control Lag Realization of Type III Error Amplifier 2 poles 1 poles Phase lag (one pole)

  41. Example Voltage-mode Control Vi = 20.0V Vo = 5.0V Ion(nominal) = 5A Io(min) = 1A Switching frequency = 50KHz Vt = 3V (Vref=0.625V) Minimum output ripple Vor(p-p) = 20mV 50dB Fo Gt = Glc+Gm+Gs Fco (Gs=0.125) Co=2600uF (Re=0) Gt(Fco)=-50dB, so the error amplifier gain at Fco is +50dB Choose Fco=50K/5=10KHz Assume 45o phase margin The total phase shift around 10KHz is 360-45=315o K=5 is chosen The phase of error amplifier is 315-180=135o The phase lag for LC is 180o Choose R1=10K, the gain of error amplifier at 2KHz is +37dB(=70.8) So R2/R1=70.8, R2=708K Fz=10K/5=2K Fp=10Kx5=50K

  42. Voltage-mode Control PSIM Simulation

  43. Voltage-mode Control Simulation Results

  44. Voltage-mode Control Error Amplifier with Transconductance (OTA) • Equivalent circuit

  45. Voltage-mode Control PSIM Simulation – Type II OTA

  46. Voltage-mode Control Simulation Results

  47. Voltage-mode Control PSIM Simulation – Type III OTA

  48. Voltage-mode Control Simulation Results

  49. Sync-Buck Converter Conduction loss ILRDS(on) Q1 Q2 CCM DCM Td Td Ts Conduction loss ILVDF Q1 D1 CCM + Vo - None DCM Synchronous Buck Converter Q1 IL Q2 Conventional Buck

  50. Sync-Buck Converter Dual Mode Control (PWM + PFM) CCM => DCM PWM => PFM(Hysteretic) (Burst Mode) DCM => CCM PFM(Hysteretic) => PWM

More Related