1 / 29

NATIONAL POLYTECHNIC INSTITUTE COMPUTING RESEARCH CENTER

NATIONAL POLYTECHNIC INSTITUTE COMPUTING RESEARCH CENTER. Design of a Multimedia Extension for RISC Processor. Eduardo Jonathan Martínez Montes Prof. Marco Antonio Ramírez Salinas. IPN-CIC. MICROSE Lab. OUTLINE. Adder Full adder Ripple carry adder Carry look ahead adder

whilemina-good
Download Presentation

NATIONAL POLYTECHNIC INSTITUTE COMPUTING RESEARCH CENTER

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. NATIONAL POLYTECHNIC INSTITUTE COMPUTING RESEARCH CENTER Design of a Multimedia Extension for RISC Processor Eduardo Jonathan Martínez Montes Prof. Marco Antonio Ramírez Salinas IPN-CIC MICROSE Lab

  2. OUTLINE • Adder • Full adder • Ripple carry adder • Carry look ahead adder • Best adder • Adder-Substracter Saturated/Wrapped 8 bits • Adder-Substracter Saturated/Wrapped 16 bits • Multiplier • Multiplier 8x8 • Multiplier 16x16 • Vector operations • Over view • Vector formats • OB format • OH format • Prototype • Instruction path • Prototype • Results IPN-CIC MICROSE Lab 2

  3. ADDER Full adder A full adder is an arithmetic circuit that is used to add three bits. Logic diagram Block diagram Boolean functions IPN-CIC MICROSE Lab 3

  4. ADDER Ripple Carry Adder (part 1) The carry propagation time is the major speed limiting factor. IPN-CIC MICROSE Lab 4

  5. ADDER Ripple Carry Adder (part 2) IPN-CIC MICROSE Lab 5

  6. ADDER Ripple Carry Adder (part 3) Features Resources: 35 LE Fmax: 208.90 MHz Size: 16 bits IPN-CIC MICROSE Lab 6

  7. ADDER Carry Look Ahead Adder (part 1) It improves speed by reducing the amount of time required to determine carry bits. IPN-CIC MICROSE Lab 7

  8. ADDER Carry Look Ahead Adder (part 2) IPN-CIC MICROSE Lab 8

  9. ADDER Carry Look Ahead Adder (part 3) Features Resources: 57 LE Fmax: 223.51 MHz Size: 16 bits IPN-CIC MICROSE Lab 9

  10. ADDER Kogge Stone Adder (part 1) It is widely considered the fastest adder design possible. IPN-CIC MICROSE Lab 10

  11. ADDER Kogge Stone Adder (part 2) Black Cell Gray Cell IPN-CIC MICROSE Lab 11

  12. ADDER Kogge Stone Adder (part 3) Features Resources: 82 LE Fmax: 255.17 MHz Size: 16 bits IPN-CIC MICROSE Lab 12

  13. ADDER Best adder IPN-CIC MICROSE Lab 13

  14. ADDER Adder-Substracter Saturated/Wrapped 8 bits Features Operations: Adder, SubstracterArithmetic: Saturated, Wrapped Size: 8 bits UnsignedInteger Resources: 59 LE Fmax: 247.46 MHz IPN-CIC MICROSE Lab 14

  15. ADDER Adder-Substracter Saturated/Wrapped 16 bits Features Operations: Adder, SubstracterArithmetic: Saturated, Wrapped Size: 16 bits SignedInteger Resources: 113 LE Fmax: 197.55 MHz IPN-CIC MICROSE Lab 15

  16. MULTIPLIER Multiplier 8x8 Features Operations: MultiplierArithmetic: Saturated, Wrapped Size: 8x8=16 bits UnsignedInteger Resources: 308 LE Fmax: 287.85 MHz IPN-CIC MICROSE Lab 16

  17. MULTIPLIER Multiplier 16x16 Features Operations: MultiplierArithmetic: Saturated, Wrapped Size: 16x16=32 bits SignedInteger Resources: 1,723 LE Fmax: 222.82 MHz IPN-CIC MICROSE Lab 17

  18. VECTOR OPERATIONS Over view Single Instruction Multiple Data, this architecture performs the same operation on multiple data elements in parallel. IPN-CIC MICROSE Lab 18

  19. VECTOR OPERATIONS Over view (cont.) IPN-CIC MICROSE Lab 19

  20. VECTOR FORMAT OB format • Unsigned. • 64 bits vector • 8 elements each one 8 bits • Accumulator contains 8 24 bits elements. IPN-CIC MICROSE Lab 20

  21. VECTOR FORMAT HB format • Signed. • 64 bits vector • 4 elements each one 16-bits • Accumulator contains 4 48-bits elements. IPN-CIC MICROSE Lab 21

  22. PROTOTYPE Instruction path IPN-CIC MICROSE Lab 22

  23. PROTOTYPE Prototype Features Resources: 8,449 LE Fmax: 176.27 MHz ADD, ADDL, ADDA SUB, SUBL, SUBA MUL, MULL, MULA LDC2, SDC2 No LPM IPN-CIC MICROSE Lab 23

  24. PROTOTYPE Results ldc2 $v3, 0($0) # $v3 = $s0 let $s0=64'h0102030405060708 sdc2 $v3, 0($s0) # $s0 = $v3 ldc2 $v4, 0($0) # $v3 = $s0 let $s0=64'h0A0B0C0D0E0FAABB sdc2 $v4, 0($s0) # $s0 = $v3 ldc2 $v5, 0($0) # $v3 = $s0 let $s0=64'hAABBCCDDEEFF1122 sdc2 $v5, 0($s0) # $s0 = $v3 IPN-CIC MICROSE Lab 24

  25. PROTOTYPE Results (cont.) ldc2 $v4, 0($0) # $v3 = $s0 let $s0=64'h0A0B0C0D0E0FAABB sdc2 $v4, 0($s0) # $s0 = $v3 ldc2 $v5, 0($0) # $v3 = $s0 let $s0=64'hAABBCCDDEEFF1122 sdc2 $v5, 0($s0) # $s0 = $v3 add.ob $v6,$v4,$v5 #$v6 = $v4+$v5 $V4 = 0A 0B 0C 0D 0E 0F AA BB + $V5 = AA BB CC DD EE FF 11 22 ----------------------------------------- $V6 = B4 C6 D8 EA FC FF BB DD Saturated IPN-CIC MICROSE Lab 25

  26. PROTOTYPE Results (cont.) ldc2 $v4, 0($0) # $v3 = $s0 let $s0=64'h0A0B0C0D0E0FAABB sdc2 $v4, 0($s0) # $s0 = $v3 ldc2 $v5, 0($0) # $v3 = $s0 let $s0=64'hAABBCCDDEEFF1122 sdc2 $v5, 0($s0) # $s0 = $v3 add.ob $v7,$v4,$v5(0) #$v7 = $v4+$v5(0) $V4 = 0A 0B 0C 0D 0E 0F AA BB + $V5(0) = 22 22 22 22 22 22 22 22 ---------------------------------------------- $V7 = 2C 2D 2E 2F 30 31 CC DD IPN-CIC MICROSE Lab 26

  27. PROTOTYPE Results (cont.) ldc2 $v4, 0($0) # $v3 = $s0 let $s0=64'h0A0B0C0D0E0FAABB sdc2 $v4, 0($s0) # $s0 = $v3 add.ob $v8,$v4,10 #$v8 = $v4+1010101010101010 $V4 = 0A 0B 0C 0D 0E 0F AA BB +0A 0A0A0A0A0A0A0A ---------------------------------------------- $V8 = 14 15 16 17 18 19 B4 C5 IPN-CIC MICROSE Lab 27

  28. PROTOTYPE Results (cont.) ldc2 $v2, 0($0) # $v3 = $s0 let $s0=64'h0908070605040302 sdc2 $v2, 0($s0) # $s0 = $v2 ldc2 $v3, 0($0) # $v3 = $s0 let $s0=64'h0102030405060708 sdc2 $v3, 0($s0) # $s0 = $v3 mul.ob$v9,$v2,$v3 #$v9 = $v2*$v3 $V2 = 09 08 07 06 05 04 03 02 X$V3 =01 02 03 04 05 06 07 08 ---------------------------------------------- $V9 = 09 10 15 18 19 18 15 10 IPN-CIC MICROSE Lab 28

  29. Q&A IPN-CIC MICROSE Lab 29

More Related