Automatic Evaluation of the Accuracy of Fixed-point Algorithms

1. Automatic Evaluation of the Accuracy of Fixed-point Algorithms Daniel MENARD1, Olivier SENTIEYS1,2 1 LASTI, University of Rennes 1 Lannion, FRANCE 2 IRISA/INRIA Rennes, FRANCE

2. Outline of the presentation • Motivations • Theoretical concepts • Accuracy evaluation methodology • Overview of the tool • Description of the different steps • Results • Conclusion

3. #define pi 3.1416 #define pi 3.1416 main() { float x,h,z for(i=1;i<n;i++) { *z= *y++ + *h++ } for(i=1;i<n;i++) { *z= *y++ + *h++ } VIRGULE FLOTTANTE.C #define pi 3.1416 #define pi 3.1416 main() { float x,h,z for(i=1;i<n;i++) { *z= *y++ + *h++ } for(i=1;i<n;i++) { *z= *y++ + *h++ } VIRGULE FLOTTANTE.C Fixed-point coding Precision evaluation Fixed-point description Floating-point description Optimization Motivations • Embedded Digital Signal Processing (DSP) systems • Specification with floating-point data types • Implementation in fixed-point architectures • Development of new methodologies for the automatic transformation of floating-point descriptions into fixed-point specifications

4. Motivations • Accuracy evaluation metric : • Signal to Quantization Noise Ratio (SQNR) : • Methodologies for the SQNR evaluation are based on simulation [Coster98], [Keding01], [Kim98] • Drawbacks : • Long simulation time [Coster98] • Fixed-point format optimization process requires multiple simulations [Sung95] • Presentation of a new methodology based on an analytical approach

5. Theoretical concepts • Linear time-invariant systems : • The output quantization noise by(n) is the sum of filtered noise sources b’(n) [Menard02] Output signal Error due to coefficient quantization Input signal Input noise + Output noise Noise sources (generated during a cast operation)

6. SQNR Computation Tool Source algorithm C Front-end stages : • CDFG generation (SUIF) • CDFG to DFG transformation • DFG to SFG transformation CDFG generation Front End SUIF SFG generation Intermediate representation Signal flow graph (SFG) + fixed-point specifications Gs Back-end stages : • T1 : Quantization noise modelisation • T2: Transfer function determination • T3 : SQNR computation Analytical method Back End SQNR

7. Transformation T1 : Gs Gsn • Goal : specify the system with a Signal Flow Graph Gsn at the quantization noise level • Steps : • Detection and insertion of the noise sources • Introduction of the operator noise models Signal node Signal node uS  u zS uN  z  zN T1 v vS + Noise node  vN Noise node Multiplication noise model

8. Transformation T2 :Gsn GH (1) • Stage T21 : Gsn Gk • Goal : transform the Signal Flow Graph Gsn into several directed acyclic graphs (DAG) • Steps : • Detection of the cycles : linear complexity algorithm • Enumeration of the cycles : polynomial complexity • Dismantle of the cycles in order to obtain DAG • Stage T22 : Gk Geq • Goal : specify the system with a set of linear functions • Step : depth-first traversal of the graph with a post-order recursive algorithm

9. Transformation T2 : Gsn GH (2) • Stage T23 : Geq GHi • Goal : specify the system with a set of partial transfer functions • Steps : • Application of a set of variable substitutions • Z transformation of the linear functions • Stage T24 :GHi GH • Goal : specify the system with a set of global transfer functions • Step : Computation of the global transfer functions from the partial transfer functions

10. Results • Test of the tool on classical DSP algorithms : FIR and IIR filters, FFT • Precision of the estimation : • Measurement of the relative error between our estimation and the one obtained by simulation • IIR 2 < 8.2 % • FIR 16 < 1.5 % • FFT 16 < 2.3 % • Execution time : • Most of the time is consumed by the stage T2 • FIR 256 : 0.86 s • IIR 4 : 0.65 s

11. Conclusion • Definition of a new methodology for computing the SQNR based on an analytical approach • Development of a tool for implementing this methodology • Limitation : the method can not cope with recursive non-linear systems • Advantages : • Smaller optimization time for the process of fixed-point data format optimization • Hardware synthesis : minimization of the chip area under SQNR constraint

12. References • [Coster98]L. D. Coster, M. Ade, R. Lauwereins, and J. Peperstraete. Code Generation for Compiled Bit-True Simulation of DSP Applications. In Proceedings of ISSS’98, Taiwan, December 1998. • [Johnson75]D. B. Johnson. Finding All the Elementary Circuits of a Directed Graph. SIAM Journal on Computing, 4(1):77–84, March 1975. • [Keding01]H. Keding, M. Coors, O. Luthje and H. Meyr. FRIDGE: Fast Bit True simulation. In Design Automation Conference 2001 (DAC 01), June 2001, Las Vegas. • [Kim98]S. Kim, K. Kum, and S. Wonyong. Fixed-Point Optimization Utility for C and C++ Based Digital Signal Processing Programs. IEEE Transactions on Circuits and Systems–II: Analog and Digital Signal Processing, 45(11), November 1998. • [Menard02]D. Menard and O. Sentieys. A methodology for evaluating the precision of fixed-point systems. ICASSP 2002, May 2002, Orlando • [Sung95]W. Sung and K. Kum. Simulation-Based Word-Length Optimization Method for Fixed-Point Digital Signal Processing Systems. IEEE Transactions on Signal Processing, 43(12), December 1995.