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Learning to Design CountersPowerPoint Presentation

Learning to Design Counters

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### Learning to DesignCounters

- Today:
- First Hour: Designing a Counter
- Section 7.2 of Katz’s Textbook
- In-class Activity #1

- Second Hour: More on Counters
- Section 7.3 of Katz’s Textbook
- In-class Activity #2

Given the current state, and its inputs. What is its next state?

S R Q Q+ J K Q Q+ D Q Q+ T Q Q+

0 0 0 0 0 0 0 0 0 0

0 0 1 0 0 1 0 1 0 1

0 1 0 0 1 0 1 0 1 0

0 1 1 0 1 1 1 1 1 1

1 0 0 1 0 0

1 0 1 1 0 1

1 1 0 1 1 0

1 1 1 1 1 1

Recap: Flip Flops0

1

1

0

0

1

0

0

1

1

X

X

0

1

0

0

1

1

1

0

0

0

1

1

X = that input is illegal

Q Q state? + R S J K T D

0 0

0 1

1 0

1 1

RESET

TOGGLE

Excitation TablesSuppose we want to change from state Q = 1 to state Q+ = 0

X 1

1 0

RESET or TOGGLE

What should be the input (excitation) for a

T flip-flop or a D flip-flop

to make this change?

J-K flip-flop

Why is JK = X1? Because either JK = 01 or JK = 11 will change state 1 to state 0. Similar reasoning yields the other entries.

Described by State Diagrams, much the same way that combinational logic circuits are described by Boolean Algebra.

Synchronous Finite-State MachinesCurrent

State

New

State

Current Input(s)

Change of state happens only on the clocking event

Example: combinational logic circuits are described by Boolean Algebra.3-bit Binary Up-Counter

001

001

010

010

000

000

Each circle corresponds to a state

The label inside each circle describes the state

011

011

111

111

Arrows represent state transitions

101

101

100

100

110

110

No labels on arrows, since the counter has no inputs

Current Next combinational logic circuits are described by Boolean Algebra.

State State

C B A C+ B+ A+

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

000

100

011

101

110

001

010

111

State Transition TableThe Table is equivalent to the Diagram

The “+” superscripts indicate new values.

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

0 0 0

State Transition Table

State Diagram

Current Next combinational logic circuits are described by Boolean Algebra.

State State

C B A C+ B+ A+

0 0 0 0 0 1

0 0 1 0 1 0

0 1 0 0 1 1

0 1 1 1 0 0

1 0 0 1 0 1

1 0 1 1 1 0

1 1 0 1 1 1

1 1 1 0 0 0

Picking a Flip-FlopLet's use T F/Fs

How many do we need?

3

State Transition Table

Neat Fact: we could have picked any other type or more than one type

Excitation Table combinational logic circuits are described by Boolean Algebra.

Q Q+ T

0 0 0

0 11

1 0 1

1 1 0

Flip-Flop Input TableWhat T F/F inputs are needed to make them change to the next state?

Current Next Flip-Flop

State State Inputs

C B A C+ B+ A+ TC TB TA

0 0 0 0 0 1

0 0 1 0 1 0

0 1 0 0 1 1

0 1 1 1 0 0

1 0 0 1 0 1

1 0 1 1 1 0

1 1 0 1 1 1

1 1 1 0 0 0

0 0 1

0 1 1

0 0 1

1 1 1

0 0 1

0 1 1

0 0 1

1 1 1

F/F Input Table

State Transition Table

C combinational logic circuits are described by Boolean Algebra.

B

Current Flip-Flop

State Inputs

C B A TC TB TA

0 0 0 0 0 1

0 0 1 0 1 1

0 1 0 0 0 1

0 1 1 1 1 1

1 0 0 0 0 1

1 0 1 0 1 1

1 1 0 0 0 1

1 1 1 1 1 1

A

0

0

0

1

1

1

1

0

0

1

1

1

1

1

1

1

1

1

TA

C

B

0

0

0

1

1

1

1

0

A

0

0

0

0

0

TB

1

1

1

1

1

C

B

0

0

0

1

1

1

1

0

A

0

0

0

0

0

TC

1

0

1

1

0

From Table to K-mapsTA = 1

TB = A

TC = A•B

Re-drawn Table

+5V combinational logic circuits are described by Boolean Algebra.

QA

QB

QC

S

S

S

Q

Q

Q

T

T

T

CLK

CLK

Q

CLK

Q

Q

R

R

R

\Reset

Count

100

\Reset

Q

C

Q

B

Q

A

Count

Build the Circuit!TB = A

TA = 1

TC = AB

Timing Diagram

Complex Counters combinational logic circuits are described by Boolean Algebra.

The generalized design process has four steps

1. Draw a State Transition Diagram

2. Derive the State Transition Table

3. Choose a Flip-Flop to Implement the Design

4. Derive the Flip-Flop Input Functions

Note: this list skips step 3 on page 341 of the Katz.

000 combinational logic circuits are described by Boolean Algebra.

011

101

010

110

Complex CountersDesign a counter with the sequence 000, 010, 011, 101, 110, and wrap

1. Derive the State Transition Diagram

State Diagram

Current Next combinational logic circuits are described by Boolean Algebra.

State State

C B A C+ B+ A+

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

000

011

101

010

110

Note the use of Don't Care conditions

2. State Transition TableTabulate the Next State for each State in the Diagram

0 1 0

X X X

0 1 1

1 0 1

X X X

1 1 0

0 0 0

X X X

State Transition Table

State Diagram

Q Q combinational logic circuits are described by Boolean Algebra.+ T

0 0 0

0 1 1

1 0 1

1 1 0

3. Choose F/FsSuppose we choose T Flip-Flops to implement the design

Excitation Table

Current Next Flip-Flop combinational logic circuits are described by Boolean Algebra.

State State Inputs

C B A C+ B+ A+ TC TB TA

0 0 0 0 1 0

0 0 1 X X X

0 1 0 0 1 1

0 1 1 1 0 1

1 0 0 X X X

1 0 1 1 1 0

1 1 0 0 0 0

1 1 1 X X X

Excitation Table

Q Q+ T

0 0 0

0 1 1

1 0 1

1 1 0

F/F Input Table

State Transition Table

4. Derive the F/F Inputs0 1 0

X X X

0 0 1

1 1 0

X X X

0 1 1

1 1 0

X X X

C combinational logic circuits are described by Boolean Algebra.

B

Current Flip-Flop

State Inputs

C B A TC TB TA

0 0 0 0 1 0

0 0 1 X X X

0 1 0 0 0 1

0 1 1 1 1 0

1 0 0 X X X

1 0 1 0 1 1

1 1 0 1 1 0

1 1 1 X X X

A

0

0

0

1

1

1

1

0

0

0 1 0 X

X 0 X 1

TA = A·B·C + B·C

1

TA

C

B

1 0 1 X

X 1 X 1

0

0

0

1

1

1

1

0

A

TB = A + B + C

0

TB

1

0 0 1 X

X 1 X 0

TC = A·C + A·C

= A C

C

B

Re-drawn Table

0

0

0

1

1

1

1

0

A

0

TC

1

SimplifyTC = A combinational logic circuits are described by Boolean Algebra. C

TA = A·B·C + B·C

TB = A + B + C

TB

B

TA

A

TC

C

S

S

S

Q

Q

T

Q

T

T

Q

Q

Q

CLK

CLK

CLK

\C

\B

\A

R

R

R

Count

\Reset

Build The Circuit!Excitation Table combinational logic circuits are described by Boolean Algebra.

For T F/F

TB

B

TA

A

TC

C

S

S

S

Q

Q Q+ T

0 0 0

0 11

1 0 1

1 1 0

Q

T

Q

T

T

Q

Q

Q

CLK

CLK

CLK

\C

\B

\A

R

R

R

Count

\Reset

Do Activity #1 NowNote: This is a just a cleaner way to sketch the circuit

Works properly in LogicWorks

When we work with hardware,

we have to explicitly wire these connections

111 combinational logic circuits are described by Boolean Algebra.

000

110

001

010

101

100

011

State Diagram

When a counter “wakes up”…Random power-up states

- The counter may be in any possible state
- This may include skipped states

In the counter example from the previous lecture, states 001, 100, & 111 were skipped

It is possible that the random power-up state may be one of these

Can we be sure the counter will sequence properly?

Present combinational logic circuits are described by Boolean Algebra.

State

Toggle

Inputs

C B A TC TB TA

0 0 0 0 1 0

0 0 1 1 0 1

0 1 0 0 0 1

0 1 1 1 1 0

1 0 0 0 1 1

1 0 1 0 1 1

1 1 0 1 1 0

1 1 1 1 1 0

Flip-Flop Input Functions

Don't-Care AssignmentsK-map minimization

The Xs for the Toggle Inputs were set by the K-maps to minimize the T Flip-Flop Input Functions

111 combinational logic circuits are described by Boolean Algebra.

000

110

001

010

101

100

011

State Diagram

Skipped State BehaviorSequences from K-map minimization

When these K-map assignments are made for the Xs, it results in

001 100, 100 111, and 111 001

Therefore, the counter might not sequence properly

000 combinational logic circuits are described by Boolean Algebra.

110

010

101

011

Self-Starting Counter111

001

100

A self-starting counter is one that transitions to a valid state even if it started off in any other state.

Many possible choices & tradeoffs

-t/RC combinational logic circuits are described by Boolean Algebra.

5e

+5

High threshold

t

Reset

Time

Counter Reset SolutionUse a separate Reset switch

Power-ON Reset Circuit: Reset signal is 1 briefly while circuit is powered up. This signal is used to reset all flip-flops.

+5V

P

W

R

C

To FF

Resets

R

Using other Flip-Flops combinational logic circuits are described by Boolean Algebra.

Just use the correct Excitation Table in setting up the flip-flop input function table.

The input functions must be appropriate for the flip-flop type (no bad input patterns).

Q Q combinational logic circuits are described by Boolean Algebra.+ J K

0 0 0 X

0 1 1 X

1 0 X 1

1 1 X 0

Q+ = J Q' + K' Q

J-K Excitation Table

Example #1:J-K F/F3-bit Counter: 0 2 3 5 6 0 …

Present

State

Next

State

Flip-Flop

Inputs

C B A C+ B+ A+ JC KC JB KB JA KA

0X1 X0 X

X X X X X X

0 XX 01 X

1 XX 1X 0

XX X X X X

X 01 XX 1

X1X 10 X

XX X X X X

00 0 010

0 0 1 X X X

010011

011101

1 0 0 X X X

1011 10

110000

1 1 1 X X X

Flip-Flop Input Functions

Fill in flip-flop input functions based on J-K excitation table

CB combinational logic circuits are described by Boolean Algebra.

CB

11

11

00

01

10

00

01

10

A

A

0 0 X X

X 1 X X

X X 1 X

X X X 0

0

0

Present

State

Next

State

Flip-Flop Input

Inputs

1

1

C B A C+ B+ A+ JC KC JB KB JA KA

0 0 0 0 1 0 0 X 1 X 0 X

0 0 1 X X X X X X X X X

0 1 0 0 1 1 0 X X 0 1 X

0 1 1 1 0 1 1 X X 1 X 0

1 0 0 X X X X X X X X X

1 0 1 1 1 0 X 0 1 X X 1

1 1 0 0 0 0 X 1 X 1 0 X

1 1 1 X X X X X X X X X

JC

KC

CB

CB

11

11

00

01

10

00

01

10

A

A

X 0 1 X

X 1 X X

1 X X X

X X X 1

0

0

1

1

JB

KB

Flip-Flop Input Functions

CB

CB

11

11

00

01

10

00

01

10

A

A

0 1 0 X

X X X X

X X X X

X 0 X 1

0

0

1

1

JA

KA

Input Function K-Maps= A

= A’

= A + C

= 1

= B C'

= C

+5V combinational logic circuits are described by Boolean Algebra.

C

B

A

A

J

Q

J

Q

JA

J

Q

CLK

CLK

CLK

\

A

C

K

Q

KB

K

Q

K

Q

\

C

\

B

\

A

Count

A

B

JA

KB

C

\

C

J-K Flip-Flop CounterResulting Logic Level Implementation:

2 Gates, 10 Input Literals + Flip-Flop Connections

C B A combinational logic circuits are described by Boolean Algebra.C+ B+ A+DC DB DA

0 0 0 0 1 0 0 1 0

0 0 1 X X X X X X

0 1 0 0 1 1 0 1 1

0 1 1 1 0 1 1 0 1

1 0 0 X X X X X X

1 0 1 1 1 0 1 1 0

1 1 0 0 0 0 0 0 0

1 1 1 X X X X X X

Example #2: D F/FSimplest Design Procedure

D F/F inputs are identical to the next

state outputs in the state transition table

C+ B+ A+ columns are identical to DC DB DA columns

C combinational logic circuits are described by Boolean Algebra.

B

A

A

DA

D

Q

D

Q

DB

D

Q

CLK

Q

CLK

Q

CLK

Q

\

C

\

B

\

A

Count

\

C

B

DB

\

A

DA

\

C

\

B

D Flip-Flop CounterResulting Logic Level Implementation:

3 Gates, 8 Input Literals + Flip-Flop connections

T F/Fs well suited for straightforward binary counters combinational logic circuits are described by Boolean Algebra.

But yielded worst gate and literal count for this example!

J-K F/Fs yielded lowest gate count

Tend to yield best choice for packaged logic where gate count is key

D F/Fs yield simplest design procedure

Best literal count

D storage devices very transistor efficient in VLSI

Best choice where area/literal count is the key

ComparisonDo Activity #2 Now combinational logic circuits are described by Boolean Algebra.

- Due: End of Class Today.NO EXTENSION TODAY
- RETAIN THE LAST PAGE(S) (#3 onwards)!!
- For Next Class:
- Bring Randy Katz Textbook, & TTL Data Book
- Required Reading:
- Sec 7.4, 7.6 of Katz

- This reading is necessary for getting points in the Studio Activity!

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