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Digital Image Processing & Image Filtering

Digital Image Processing & Image Filtering. Jonathan Mason Software Engineer, Harris Corp. July 10, 2003. Uses of image filtering. Noise Reduction Low Pass Filter Image Recovery Wiener Filter Edge Detection High Pass Filter. The Filtering Operation. Convolution Continuous (Analog)

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Digital Image Processing & Image Filtering

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  1. Digital Image Processing &Image Filtering Jonathan Mason Software Engineer, Harris Corp. July 10, 2003

  2. Uses of image filtering • Noise Reduction • Low Pass Filter • Image Recovery • Wiener Filter • Edge Detection • High Pass Filter

  3. The Filtering Operation • Convolution • Continuous (Analog) f * g =∫ f(τ) g(t - τ) dτ • Discrete (Digital) f(i) * g(i) = Σf(j) g(i-j)

  4. Sliding Window Approach

  5. Design Considerations • Filter Creation • Choosing Coefficients • Border Considerations • Wrap-around • Extend border • Ignore border

  6. Types of Filters • Low Pass or Averaging Filter [ 0 1 0 ] [ 1 4 1 ] [ 0 1 0 ]

  7. Types of Filters • High Pass • Horizontal Edge Detection (Sobel) [ 1 2 1 ] [ 0 0 0 ] [ -1 –2 –1 ] • Vertical Edge Detection (Sobel) [ 1 0 -1 ] [ 2 0 -2 ] [ 1 0 -1 ]

  8. High Level Design

  9. State Progression

  10. State Progression VHDL INIT: process(clock, resetn) begin led <= resetn; if (clock'event and clock = '1') then currentState <= nextState; end if; end process; STATE_PROGRESSION: process(btn, db, adr, resetn) begin if (adr = "010" and oe = '1' and cs = '1') then case thedb is when "10000000" => -- SW8 on the DIO2 board nextState <= displayImageState; when "01000000" => -- SW7 on the DIO2 board nextState <= displayInvertedImageState; when "00100000" => -- SW6 on the DIO2 board nextState <= displayLowPassFilteredImageState; when "00010000" => -- SW5 on the DIO2 board nextState <= displayHighPassHorizontalFilteredState; when "00001000" => -- SW4 on the DIO2 board nextState <= displayHighPassVerticalFilteredState; when others => nextState <= resetState; end case; end if; end process;

  11. VGA Signal

  12. Filter and Image VHDL IMAGE: process(enable, hcnt, vcnt, currentState, resetn) begin -- This is a low pass or averaging filter lpFilter <= ( 0 => (0,1,0), 1 => (1,4,1), 2 => (0,1,0) ); -- This is the vertical edge detecting high pass filter. -- Also known as a Sobel edge detector. hpvFilter <= ( 0 => (1,0,-1), 1 => (2,0,-2), 2 => (1,0,-1) ); -- This is the horizontal edge detecting high pass filter. -- Also known as a Sobel edge detector. hphFilter <= ( 0 => (1,2,1), 1 => (0,0,0), 2 => (-1,-2,-1) ); -- This is the 64x64 array of pixel values. imageValues <= ( 0 => ("100","100","100","101","101","101","101", - - -,"111"), 1 => ("101","101","100","101","101","101","101", - - -,"111"), 2 => ("101","100","100","101","100","101","101", - - -,"111"), … 63 => ("100","100","100","101","100","100","101", - - -,"111"));

  13. Image Generation VHDL IMAGE: process(enable, hcnt, vcnt, currentState, resetn) begin if (enable = '1') then if (hcnt > (H_PIXELS/2 - IMAGE_WIDTH/2) and hcnt < (H_PIXELS/2 + IMAGE_WIDTH/2)) then if (vcnt > (V_LINES/2 - IMAGE_WIDTH/2) and vcnt < (V_LINES/2 + IMAGE_WIDTH/2)) then hIndex <= conv_std_logic_vector(conv_integer(hcnt) - (H_PIXELS/2 - IMAGE_WIDTH/2),8); vIndex <= conv_std_logic_vector(conv_integer(vcnt) - (V_LINES/2 - IMAGE_WIDTH/2),8); -- If we are within the boundaries of the image, we must determine how to -- display the image, based on the current state. case currentState is when displayImageState => pixel <= imageValues(conv_integer(vIndex))(conv_integer(hIndex))(0) & imageValues(conv_integer(vIndex))(conv_integer(hIndex))(1) & imageValues(conv_integer(vIndex))(conv_integer(hIndex))(0) & imageValues(conv_integer(vIndex))(conv_integer(hIndex))(1) & imageValues(conv_integer(vIndex))(conv_integer(hIndex))(2) & imageValues(conv_integer(vIndex))(conv_integer(hIndex))(0) & imageValues(conv_integer(vIndex))(conv_integer(hIndex))(1) & imageValues(conv_integer(vIndex))(conv_integer(hIndex))(2); when others => pixel <= "00000000"; --invalid state, output no image. end case; else ---out of range of the image height, output a white background. pixel <= "11111111"; end if; else ---out of range of the image width, output a white background. pixel <= "11111111"; end if; else -- The reset button has been pressed, so output nothing. pixel <= "00000000"; end if; end process;

  14. Convolution VHDL when displayLowPassFilteredImageState => -- Display the image with the low pass filter applied. if(conv_integer(vIndex) > 0 and conv_integer(vIndex) < (IMAGE_WIDTH - 1) and conv_integer(hIndex) > 0 and conv_integer(hIndex) < (IMAGE_WIDTH - 1)) then --convolution of pixel value with the filter pixel <= conv_std_logic_vector( ( conv_integer(imageValues(conv_integer(vIndex-1))(conv_integer(hIndex-1))) * lpFilter(0)(0) + conv_integer(imageValues(conv_integer(vIndex-1))(conv_integer(hIndex))) * lpFilter(0)(1) + conv_integer(imageValues(conv_integer(vIndex-1))(conv_integer(hIndex+1))) * lpFilter(0)(2) + conv_integer(imageValues(conv_integer(vIndex)) (conv_integer(hIndex-1))) * lpFilter(1)(0) + conv_integer(imageValues(conv_integer(vIndex)) (conv_integer(hIndex))) * lpFilter(1)(1) + conv_integer(imageValues(conv_integer(vIndex)) (conv_integer(hIndex+1))) * lpFilter(1)(2) + conv_integer(imageValues(conv_integer(vIndex+1))(conv_integer(hIndex-1))) * lpFilter(2)(0) + conv_integer(imageValues(conv_integer(vIndex+1))(conv_integer(hIndex))) * lpFilter(2)(1) + conv_integer(imageValues(conv_integer(vIndex+1))(conv_integer(hIndex+1))) * lpFilter(2)(2) )/8, 3)(0) & - - - repeated for each pixel output value

  15. VGA Timing Diagram

  16. VGA Signal VHDL VERTICAL_COUNTER: process(hsyncint, resetn) begin if (resetn = '1') then vcnt <= (others => '0'); elsif (hsyncint'event and hsyncint = '1') then if vcnt < V_PERIOD then vcnt <= vcnt + 1; else vcnt <= (others => '0'); end if; end if; end process; VERTICAL_SYNC: process(hsyncint, resetn) begin if (resetn = '1') then vsync <= '1'; elsif (hsyncint'event and hsyncint = '1') then if (vcnt >= V_SYNCSTART and vcnt < V_SYNCEND) then vsync <= '0'; else vsync <= '1'; end if; end if; end process;

  17. VGA Signal Enable VHDL OUTPUT_ENABLE: process(clock) begin if (clock'event and clock = '1') then if (hcnt >= H_PIXELS or vcnt >= V_LINES) then enable <= '0'; else enable <= '1'; end if; end if; end process; end behavioral;

  18. Matlab Verification Code %read in the image fid=fopen(IMAGE_NAME); imageMatrix=fread(fid,[IMAGE_WIDTH,IMAGE_HEIGHT]); fclose(fid); %invert the matrix so that it will be displayed properly imageMatrix=imageMatrix'; %%Apply an impulse to the filter. Then calculate %%the phase and amplitude of the filter in the %%frequency domain. filtered_image = conv2(low_pass_filter,imageMatrix,'same'); v_e_d_image = conv2(vertical_edge_detector,imageMatrix,'same'); h_e_d_image = conv2(horizontal_edge_detector, imageMatrix,'same');

  19. Matlab Verification Output

  20. Project Output

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