16F877A

1. 16F877A

8. Some pins for these I/O ports are multiplexed with an alternate function for the peripheral features on the device. In general, when a peripheral is enabled, that pin may not be used as a general purpose I/O pin. • Additional information on I/O ports may be found in the PICmicro™ Mid-Range Reference Manual (DS33023). • 4.1 PORTA and the TRISA Register • PORTA is a 6-bit wide, bidirectional port. The corresponding data direction register is TRISA. Setting a TRISA bit (= 1) will make the corresponding PORTA pin an input (i.e., put the corresponding output driver in a • High-Impedance mode). Clearing a TRISA bit (= 0) will make the corresponding PORTA pin an output (i.e., put the contents of the output latch on the selected pin).

9. The Timer0 module timer/counter has the following • features: • 8-bit timer/counter • Readable and writable • 8-bit software programmable prescaler • Internal or external clock select • Interrupt on overflow from FFh to 00h • Edge select for external clock • Figure 5-1 is a block diagram of the Timer0 module and the prescaler shared with the WDT. • Timer mode is selected by clearing bit T0CS • (OPTION_REG<5>). In Timer mode, the Timer0 module will increment every instruction cycle (without prescaler). If the TMR0 register is written, the increment is inhibited for the following two instruction cycles. The user can work around this by writing an adjusted value to the TMR0 register.

11. RESET • 14.4 MCLR. PIC16F87XA devices have a noise filter in the MCLR Reset path. The filter will detect and ignore small pulses. • 14.6 Power-up Timer (PWRT). The Power-up Timer provides a fixed 72 ms nominal time-out on power-up only from the POR. The Powerup Timer operates on an internal RC oscillator. The chip is kept in Reset as long as the PWRT is active. The PWRT’s time delay allows VDD to rise to an acceptable level. • 14.7 Oscillator Start-up Timer (OST). The Oscillator Start-up Timer (OST) provides a delay of 1024 oscillator cycles (from OSC1 input) after the PWRT delay is over (if PWRT is enabled). This helps to ensure that the crystal oscillator or resonator has started and stabilized. • 14.8 Brown-out Reset (BOR). The configuration bit, BODEN, can enable or disable the Brown-out Reset circuit. If VDD falls below VBOR (parameter D005, about 4V) for longer than TBOR (parameter #35, about 100 µS), the brown-out situation will reset the device. If VDD falls below VBOR for less than TBOR, a Reset may not occur. Once the brown-out occurs, the device will remain in Brown-out Reset until VDD rises above VBOR. • 14.13 Watchdog Timer (WDT). The Watchdog Timer is a free running, on-chip RC • oscillator which does not require any external components. This RC oscillator is separate from the RC oscillator of the OSC1/CLKI pin. During normal operation, a WDT time-out generates a device Reset (Watchdog Timer Reset). If the device is in Sleep mode, a WDT time-out causes the device to wake-up and continue with normal operation (Watchdog • Timer Wake-up).