OPTIMAL ELECTRONIC CIRCUITS and MICROSYSTEMS NETWORKED DESIGNER

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OPTIMAL ELECTRONIC CIRCUITS and MICROSYSTEMS NETWORKED DESIGNER

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OPTIMAL ELECTRONIC CIRCUITS and MICROSYSTEMS NETWORKED DESIGNER

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NTUU "KPI" 1898

OPTIMAL ELECTRONIC CIRCUITS and MICROSYSTEMS NETWORKED DESIGNER

Prof. ANATOLY PETRENKO

National Technical University of Ukraine

“Kiev Polytechnic Institute”,

Tel./FAX +380 44 280 90 46,

e-mail: petrenko@cad.kiev.ua

- Networked CAD tools
- International co-operation Experience
- ALLTED – All Technology Designer
- Novel numerical methods
- Results of solving the benchmark circuits
- Optimization example
- AND Logical Circuit on OET
- Possible co-operation

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- Remote access to CAD tools and collectively execution the joint Projects;
- Meeting different requirements to hardware of a server and a client ;
- New level of functional cooperation via GRID infrastructure;
- Possibilities for Small and Middle enterprises to take a part in international work force distribution developing competitive products.

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Previous versions of this system (named SPARS, PRAM-01, PRAM-PK, PRANS for EC and SM computers) were used in the former Soviet Union as the branch Ministry of the Defense industry standard OST V3-4776-80 for circuit design automation and similar standards for the Ministries of General and Average Machinobuilding and Radio industry.

ALLTED is especially useful in the development of new products which combine various physical phenomena in one device

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- Digital (Alpha Processor simulation)
- Intel (Parallel computation, Formal verification, Layout extraction, VLSI Interconnects Model-Order Reduction ,ALOE to Cadence / Cadence toALOEconverters)
- General Electric (MEMS Model design)
- Motorola( Signal Processors implementation)
- Sun ( Layout verification)
- Panasonic (Remote Access to Networked Appliances )
- Melexes (VLSI design with 0.25 u)
- HPC –Germany ( RF circuits design)
- EC Projects( Tempus, Inco- Copernicus)
- STCU Projects( Remote Simulation, MEMS Design)

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- ALLTEDis an acronym forALLTEchnologyDesigner. It was developed not only for simulation and analysis, but for processing project procedures such as:
- parametric optimization tasks;
- optimal tolerance assignments;
- centering availability regions;
- yield maximization;
- design of Nonlinear Dynamic Systems composed of either/and electronic, hydraulic, pneumatic, mechanical, electromagnetic, and other elements.

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- Faster simulation speed and improved numerical
convergence;

- Sensitivity analysis for frequency and transient analyses;
- Comprehensive optimization procedure and optimal tolerances assignment ;
- Alternative approach to the secondary response parameters determination (delays, rise and fall times, etc.);
- Powerful user-defined modeling capability.
- Original way of generating a system-level model of MEMS from FEM component equations.

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- The new solution curve-search method for Steady
State (DC) Analysis which provides the quick descent to the solution point region from any starting point

- The Diagonal Modification Method which helps considerably preserve convergence of linearized equations solution without re-ordering when matrix element values change from one iteration to another iteration .
- The Optimization Variable-order Methods which is equivalent to taking into consideration five terms of Tailor’s series for the Goal functionwhich considerably improve determination of a direction to the optimal point

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- The Implicit Linear Multi-step Variable-order Integration Method for Transient Analysis(TR) which uses high order back differences that allows to select the proper one resulting in minimization of solution time for prescribed accuracy.
- The Optimal Tolerances Assignment Method which is based on applying Optimization procedures and takes into account the prescribed deviations of Controlled Output Parameters
- Statistical Yield Maximization Method which provides “centering” the solution point in the region of acceptable solutions

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Конкурс исследовательскихпроектов области автоматизации

Проектирования интегральных схем

награждается

ПЕТРЕНКО АНАТОЛИЙ ИВАНОВИЧ

Национальный Технический Университет Украины «Киевский

политехнический институт

ПРОЕКТ

Разработка эффективных численных методов моделирования

и оптимизации схемотехнических решений для СБИС

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Circuit ALLTEDPSPICEGain

Iteration Iteration

INPUT358 755 2.11

CHARGE4682 7625 1.63

FADD32 873 2280 2.61

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- S t a t i s t i c s
- Number of steps = 256
- Number of iterations = 528
- Number of steps per order:
- order - 0 - = 26
- order - 1 - = 46
- order - 2 - = 90
- order - 3 - = 71
- order - 4 - = 19
- order - 5 - = 4
- order - 6 - = 0
- Number of rejected steps = 23
- HSPICE uses only 2-d order integration formula

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Optimization example 1

Circuit: Operational Amplifier

RCA 3040 with 11 transistors

Task: calculate the resistances R1, R3

and R4 values in such a way, that the

output impulse amplitude on resistor

R11 would be equal to 8 V.

0.1 <= R1 <= 10

0.1K <= R3 <= 10

0.1K <= R4 <= 10K

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Task file:

tr;

optim;

const DCERR=1.e-6;

const tmax=90, MINSTEP=1e-4, ERR=0.01, LERR=0.1, REVAL=3;

# TR OUTPUT parameters

fix T3=MINF(UR11);

fix T4=MAXF(UR11);

INT DURF=T4-T3;

const method=120;

varpar R1(0.01,10), R3(1,100), R4(1,100);

of DIF1 = F1(8/DURF);

plot Ur11;

Objective function

DIF1 = .3146487870E-07

R E S U L T S O F O P T I M I Z A T I O N

Variable parameters

R1 = .1000000000E+01

R3 = .6778549874E+01

R4 = .6778549874E+01 Directive F I X output characteristics

T3 = 2.47580528

T4 = 10.4756279

Directive I N T output characteristics

DURF = 7.99982262

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Circuit: Active RC filter RAD

- Task;
- dc;
- ac;
- optim;
- const lfreq=0.0025, ufreq=0.005,METHOD=152;
- TF K1=V6/UE1;
- plot MA.K1;
- fixf1=MAXA(MA.K1);
- fixf2=MAXF(MA.K1)
- func f5=F7(1/f2);
- of error=f5(1/f5);
- varpar Alpha.OP1(3E1,4E3), Alpha.OP2(0.6E1,1E3);
- limitLim2=F2(0.003734/f1);

Constraints

RESULTS OF OPTIMIZATION

ERROR= 0.1786038652D-01

Variable parameters

ALPHA.OP1 = 0.3709765013D+04

ALPHA.OP2= 0.1000000000D+04

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Optimal tolerance assignment example:

Circuit: Operational AmplifierRCA 3040 with 11 transistors

Task: calculate the resistances R2, R3 and voltage source E2 tolerances values

for which the output minimal voltage UR11 changes +/- 5% of itsvalue.

task;

dc;

tr;

tolas;

const tmax=90 ,ERR=0.01,

LERR=0.1, REVAL=3;

FIX UM=minf(UR11);

const TOLERR=0.001;

control UM(5,5);

varpar E2(10),R2,R3(10);

O P T I M A L T O L E R A N C E S

***********************************

Parameter Nominal Tolerance

value % abs

E2 .1200000000E+02 +- 19.682 +- -.2361829758E+01

R2 .1000000015E+00 +- 4.614 +- .4613934550E-02

R3 .1000000000E+01 +- 3.697 +- .3696829081E-01

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Mixed Analyses example

Macromodel 2-input AND Cell(0,1,2,3);

j1(1,0)=f300(ut,rbx/uj1);

j2(2,0)=f300(ut,rbx/uj2);

e1(3,0)=f310(u1,u0,f1,d1,f0,d0,r1,r0,-1/ue1,ie1);

list m1.icand;

rbx=50; ut=1; u0=0.3; u1=2.4; f1=-1; d1=10;

f0=-1; d0=10; r1=0.1; r0=0.02;

Now we are going to provide possibilities

for users to access NetALLTED resources through the Internet for optimal

Microsystems design.

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The example of Micro-machined Ultrasonic

Transducer simulation

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One-electron transistor model

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L

W

T

Er

H

- Model of transmission linewith a negative inductance

Fig. 8 The

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- New components mathematical models incorporating ( in equations form)
- New graphical symbols for components, if any
- New sections in library with components parameters
- OF, LIMIT and FUNC libraries upgrading
if any

- Numerical procedures constants adjusting for new types of tasks

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System level

Circuit level

Components level

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Model Order reduction

(Krylov- Arnoldi Method)

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Для складних 2-х і 3-х вимірних компонентів схемні моделі можуть мати дуже велику розмірність, ґтак що їхпорядок теж треба скорочувати

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Для складних 2-х і 3-х вимірних компонентів схемні моделі можуть мати дуже велику розмірність, ґтак що їхпорядок теж треба скорочувати

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n = 2; f = 1018,1 kHz

n = 1; f = 181,36 kHz

n = 3; f = 1018,1 kHz

n = 4; f = 3427,8 kHz

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- ALLTED facilities Testing on Samsung Examples(optimization, tolerance assignment, yield maximization, DC conversion, RF design etc.)
- Adaptation and enrichment of ALLTED component models Library (including new ones, say, for CCD , MEMS and IP Solutions),using semantic formats
- Developing parallel numerical simulation algorithms for a supercomputer
- Implementation of parallel ALLTED version in Grid environment and providing possibilities of remote its executing through Internet
- Development of the methodology of IC energy consumption minimization based on ALLTED optimization procedures (say, by varying W and L of transistors and keeping the given frequency value).

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