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Safe Queue?. … while (next(head) == tail); // block if full queue[head] = data; // write data ET0 = 0; // disable T-0 interrupts head = next(head); // update pointer ET1 = 1; // enable T-1 interrupts … unsigned char next(unsigned char ptr) { if (ptr == QMX) ptr = 0; else ptr++

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safe queue
Safe Queue?
  • while (next(head) == tail); // block if full
  • queue[head] = data; // write data
  • ET0 = 0; // disable T-0 interrupts
  • head = next(head); // update pointer
  • ET1 = 1; // enable T-1 interrupts
  • unsigned char next(unsigned char ptr) {
  • if (ptr == QMX) ptr = 0;
  • else ptr++
  • return(ptr);
  • }
consider the compiler
Consider the compiler

Compiler output?

MOV R0,TAIL

MOV R1,HEAD

LOOP: ACALL NEXT SUBB A,R0

JZ LOOP

MOV R3,#QUEUE

ADD R3,R1

MOV @R3,R4

CLR ET0

ACALL NEXT

MOV HEAD,A

SETB ET0

C code for blocking queue

while (next(head) == tail);

queue[head] = data;

ET0 = 0;

head = next(head);

ET1 = 1;

unsigned char next(unsigned char ptr) {

if (ptr == 9) ptr = 0;

else ptr++

return(ptr);

}

Assume next() returns value in accumulator, leaves R1 as is

i think we re safe now
I think we’re safe now

MOV R1,HEAD

LOOP: ACALL NEXT

MOV R0,TAIL ;refresh

SUBB A,R0

JZ LOOP

MOV R3,#QUEUE

ADD R3,R1

MOV @R3,R4

CLR ET0

ACALL NEXT

MOV HEAD,A

SETB ET0

volatile data unsigned char tail;

while (next(head) == tail);

queue[head] = data;

ET0 = 0;

head = next(head);

ET1 = 1;

unsigned char next(unsigned char ptr) {

if (ptr == 9) ptr = 0;

else ptr++

return(ptr);

}

*compiler knows that sfr’s are volatile (ports, flags)

embedded software architectures
Embedded Software Architectures
  • No Operating System
    • Round robin: sequential polling for events
    • Round robin w/ interrupts
    • Function Queue Scheduling
  • Real Time Operating System
maestro w round robin only
Maestro w/ Round Robin Only

void main (void) {

if (TF0) music_task(); // process timer overflow

if (R1) serial_input_task(); // process serial input

}

Would this work for maestro (lab4)?

How do we know?

task diagram
Task Diagram

Worst case: character comes one cycle before TF0

Worst Case Latency = max run time of all other tasks

main

serial task

serial

music

main

w.c. latency

deadline

What is the worst

case serial processing

time?

Depends on response message length--could be bad!

How much latency can we

tolerate? Practically none

timer0 overflow occurs (TF0)

char arrives

round robin w interrupts
Round Robin w/ Interrupts

volatile bit fEvent;

void isr(void) {

time_critical_processing();

fEvent = TRUE;

}

void main (void) {

if (R1) serial_input_task();

if (fEvent) {

housekeeping();

fEvent = FALSE;

}

}

Why not put housekeeping into the ISR too?

Then our worst case latency to a separate time critical event would be poor

Would this work for maestro? See next slide

maestro in rr int

What are the time critical functions?Flipping channels, change tones at end of timeslice

What are the housekeeping functions?

TNE count down and stream processing (TNE, Tones)

Do these have hard time constraints too?

Yes, one time slice (18ms)…good enough? Not necessarily…serial is undefined!

Maestro in RR+INT

volatile bit fEndOfSlice;

void isr(void) {

process_tones();

if (!--sliceCount) {

changeTones();

sliceCount = SliceSize

fEndOfSlice = TRUE;

}

}

main () {

if (R1) serial_input_task();

if (fEndOfSlice) {

if (--TNE==0)

process_next_event(); fEndOfSlice = FALSE;

}

}

task diagram1
Task Diagram

Worst case analysis: character comes one cycle before TF0

Problem: housekeeping can still miss its deadline, depends on serial task execution time

time slice start

time slice end

isr

serial

housekeeping

main

deadline

timer0 overflow occurs (TF0)

Can we do better?

char arrives

benefits
Benefits
  • Modularization of the Application
  • Some Virtual Machine Features
    • Device Drivers (Virtual Devices)
embedded software
Embedded Software
  • Software States v. Finite State Machines
  • Hierarchical State
  • Thread/Process Communication
    • Critical Sections
    • Synchronization
    • Messaging and Signaling
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