SFR Workshop November 8, 2000 Junwei Bao, Costas Spanos Berkeley, CA

1. Simulator Assisted Process Monitor and Optimization Using Full-profile Metrology for DUV Lithography SFR Workshop November 8, 2000 Junwei Bao, Costas Spanos Berkeley, CA 2001 GOAL: to demonstrate simulator tuning for full profile matching over a range of focus and exposure conditions by 9/30/2001.

2. Motivation • Lithography simulators are mainly used to study the qualitative effects and trends of certain parameters. • Importance of quantitative predictive capabilities is increasing with increasing development costs and time-to-market pressures. • Extremely small process window leads to unstable process. • More frequent and in-line measurement is needed to monitor process drift. • Process recipe needs to be optimized to maximize the yield considering the effect of parameter variations.

3. Experimental Simulator Tuning and Process Characterization • Design of Experiment • 24 wafers, patterned using focus-exposure matrix • Different softbake temperature, PEB temperature and time, develop time • Resist index variation due to bake temperature is very small – can be ignored for scatterometry library generation

4. Simulator Calibration using Full-profile Metrology • Full-profile information is needed for simulator calibration due to high-dimensionality and non-linearity of the parameter space. • Scatterometry • Non-destructive • High throughput and in-line capability • Full-profile information • Other full-profile metrologies • Applied Materials, VeraSEM™3D Metrology SEM™ • AFM • Cross-section SEM

5. Scatterometry Repeatability Characterization Using STI Structure Reproducibility: 10 consecutive measurements at same location with one time wafer loading Repeatability: Each measurements was performed on fresh loading on the same wafer Long-term data collected from June 9 to June 27

6. Process Monitoring using in-line Metrology Process Monitor based on tuned simulator resist thickness n & k thickness DITL resist profile reflectometer ellipsometer reflectometer scatterometer Exposure Develop Spin coat & softbake PEB

7. Yield Prediction • Distribution of equipment settings • Historical data obtained from equipment characterization • Estimated from simulator-process mismatch estimation • Process window calculation • Generate input parameter – output profile relation using calibrated simulator • Calculate process window according to profile constraint • Predicting Yield of lithography process by overlap integration

8. Process Window Engineering • Change the shape of the process window by adjusting the operating point settings and material parameters (if possible), so that the overlap integration between the joint p.d.f of inputs and the process window, i.e., the projected lithography yield, is maximized.

9. Parameter distributions In-die spatial variation Simulated Output distributions Profiles within spec. Calibrated Lithography Simulator Operating Point distributions + - Overlapping to get yield RECIPE OPTIMIZER 2002 and 2003 Goals Demonstrate lithography simulator tuning for full statistical profile matching over a range of conditions, by 9/30/2002. Implement lithography controller that merges full profile in-line information with available metrology, by 9/30/2003.