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Interconnection Styles. export. export. use. M1. M4. use. use. use. M5. M2. SS4. SS2. M6. use. M3. export. SS3. SS1. S. Software Design Following the Export (Server) Style. SS1. Software Design Following the Export (Client) Style. ec. ec. use. M1. M4. use. use. use.

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Interconnection styles
Interconnection Styles

Reverse Engineering (Interconnection Styles)


Software design following the export server style

export

export

use

M1

M4

use

use

use

M5

M2

SS4

SS2

M6

use

M3

export

SS3

SS1

S

Software Design Following the Export (Server) Style

Reverse Engineering (Interconnection Styles)


Software design following the export client style

SS1

Software Design Following the Export (Client) Style

ec

ec

use

M1

M4

use

use

use

M5

M2

SS4

SS2

use

M3

M6

ec

SS3

S

Reverse Engineering (Interconnection Styles)


Software design following the export client export style

SS1

Software Design Following the Export Client / Export Style

export

ec

ec

export

use

M1

M4

use

use

use

M5

M2

SS4

SS2

use

M3

M6

ec

export

SS3

S

Reverse Engineering (Interconnection Styles)


Software design following the import style

SS1

Software Design Following the Import Style

import

import

M1

M4

use

use

use

use

M5

M2

SS4

SS2

use

M3

M6

SS3

S

Reverse Engineering (Interconnection Styles)


Software design following the import export style

SS1

Software Design Following the Import / Export Style

export

import

import

export

M1

M4

use

use

use

use

M5

M2

SS4

SS2

use

M3

M6

export

SS3

S

Reverse Engineering (Interconnection Styles)


Software design following the tube style

SS1

Software Design Following the Tube Style

tube

tube

M1

M4

use

use

use

use

M5

M2

SS4

SS2

tube

use

M3

M6

SS3

S

Reverse Engineering (Interconnection Styles)


Interconnection style formalism
Interconnection Style Formalism

  • An ISF specification consists of a finite set of logic rules. There are two kinds of ISF rules:

    • Permission: Determine the syntactically legal relations between the components of a software design.

    • Definition: Define new relations based on patterns of entities and relations.

Reverse Engineering (Interconnection Styles)


Interconnection style formalism cont d
Interconnection Style Formalism (Cont’d)

  • Each rule consists of a finite set of entities and relations.

  • Entities represent design components and relations represent interconnections between these components.

Reverse Engineering (Interconnection Styles)


Design

View

Model-Theory

View

Datalog

View

export

export

export

export

export

export

export

export

export

export

export

use

use

use

use

use

export

use

use

use

use

use

use

M1

M1

M1

M1

M1

M1

M4

M4

M4

M4

M4

M4

use

use

use

use

use

use

use

use

use

use

use

use

use

SS4

SS4

SS4

SS4

SS4

M5

M5

M5

M5

M5

M5

SS2

SS2

SS2

SS2

SS2

M2

M2

M2

M2

M2

M2

SS4

SS2

use

use

use

use

use

use

M6

M6

M6

M6

M6

M6

M3

M3

M3

M3

M3

M3

export

export

export

export

export

SS3

SS3

SS3

SS3

SS3

SS1

SS1

SS1

SS1

SS1

S

S

S

S

S

export

SS3

SS1

S

Set of

Mathematical

Relations

(Interpret.)

Set of

DatalogFacts

input

Union

Satisfies?

Set of

Logic

Formulas

(Theory)

Set of

Datalog

Rules

satisfies

style

does not satisfy

style

model

not model

Wellformed?

Yes/no

Reverse Engineering (Interconnection Styles)


Design example
Design Example

export

M2

use

export

use

use

M3

M4

use

SS1.1

M5

SS2.1

use

M1

M6

SS1

SS2

Reverse Engineering (Interconnection Styles)


Design example in datalog
Design Example in Datalog

Reverse Engineering (Interconnection Styles)


Formal definition of isf
Formal Definition of ISF

  • The syntax of ISF is described by presenting the visual symbols of the notation.

  • These symbols represent design:

    • entities

    • relations

    • rules

  • The semantics of ISF is described using Datalog.

Reverse Engineering (Interconnection Styles)


Formal definition of isf1
Formal Definition of ISF

  • The semantics of ISF is presented bottom-up:

    • semantics of ISF entities and relations

    • semantics of ISF rules in terms of the semantics of entities and relations

Reverse Engineering (Interconnection Styles)


Isf entities
ISF Entities

  • ISF entities are depicted as labeled rectangles.

  • Each ISF entity represents a set of typed design components such as:

    • modules, classes, subsystems, etc.

  • There are three types of entities:

label

label

label

Reverse Engineering (Interconnection Styles)


Example of an isf entity
Example of an ISF Entity

  • An example of an ISF entity is:

  • Formally:subsystem(SS)

    • where SS is a free variable.

  • Informally: “The set of all subsystems in a software design.”

Subsystem

Reverse Engineering (Interconnection Styles)


Isf relations
ISF Relations

  • ISF relations are depicted as:

    • labeled edges

    • nested rectangles

  • Each ISF relation represents a relation of a software design such as:

    • containment (depicted as nested rectangles)

    • import

    • export

    • inherit, etc.

Reverse Engineering (Interconnection Styles)


Isf containment relations
ISF Containment Relations

e2

e1

1. Entity contains simple entity

subsystem

subsystem

subsystem

subsystem

e2

Contain(PSS,SS),

subsystem(PSS)

subsystem(SS)

rtc_contain(PSS,SS),

subsystem(PSS)

subsystem(SS)

e1

2. Entity contains transitive entity

e2

e1

1. Entity contains permission entity

Reverse Engineering (Interconnection Styles)


Isf edge relations
ISF Edge Relations

r

e1

e2

1. Simple Relation

r

e1

e2

2. Negated Simple Relation

r

e1

e2

3. Reflexive Transitive Relation

r

e1

e2

4. Negated Reflexive Transitive Relation

r

e2

e1

5,6. Permission or Definition Relation

Reverse Engineering (Interconnection Styles)


Examples of edge relations

subsystem

subsystem

subsystem

subsystem

subsystem

subsystem

subsystem

subsystem

Examples of Edge Relations

use

use

use(SS1,SS2),

subsystem(SS1),

subsystem(SS2)

not(use(SS1,SS2)),

subsystem(SS1),

subsystem(SS2)

use

use

rtc_use(SS1,SS2),

subsystem(SS1),

subsystem(SS2)

not(rtc_use(SS1,SS2)),

subsystem(SS1),

subsystem(SS2)

tc_r(X,Y) :- r(X,Y).

tc_r(X,Y) :- r(X,Z), tc_r(Z,Y).

rtc_c(X,Y) :- X = Y.

rtc_r(X,Y) :- tc_r(X,Y).

Reverse Engineering (Interconnection Styles)


Isf rules the export style part 1
ISF Rules:The Export Style (Part 1)

PERMIT

PERMIT

export

ss

ss

ss

ss

wf_export(PSS,SS) :-

ss(PSS), ss(SS), contain(PSS,SS).

ill_formed() :- export(X,Y),

not(wf_export(X,Y)).

wf_contain(PSS,SS) :- ss(PSS),ss(SS).

ill_formed() :- contain(X,Y),

not(wf_contain(X,Y)).

well_formed_design() :- not(ill_formed()).

Reverse Engineering (Interconnection Styles)


Isf rules the export style part 2
ISF Rules:The Export Style (Part 2)

Reverse Engineering (Interconnection Styles)


Export client export style
Export Client / Export Style

Reverse Engineering (Interconnection Styles)


Import export style part 1
Import / Export Style (Part 1)

Reverse Engineering (Interconnection Styles)


Import export style part 2
Import / Export Style (Part 2)

Reverse Engineering (Interconnection Styles)


Tube style part1
Tube Style (Part1)

Reverse Engineering (Interconnection Styles)


Tube style part 2
Tube Style (Part 2)

Reverse Engineering (Interconnection Styles)


On the Automatic Recovery

of Style-Specific

Structural Dependencies

Reverse Engineering (Interconnection Styles)


Introduction
Introduction

  • Motivation

  • Definitions

    • MDG

    • Clustering

    • Interconnection Styles

    • ISF

  • Examples

  • Tool

Reverse Engineering (Interconnection Styles)


Motivation
Motivation

  • Documentation problems:

    • Missing or inaccurate design documentation

    • Poorly documented code

    • Original programmers not available for consultation

  • Program understanding. Need for high-level information

    • Existing clustering techniques do not produce high-level dependencies.

  • Design validation

Reverse Engineering (Interconnection Styles)


Module dependency graph

Nodes represent modules

Edges represent dependencies between modules (i.e. method invocation, variable reference, etc)

Obtained automatically with Cia, Acacia, Chava

Module Dependency Graph

Reverse Engineering (Interconnection Styles)


Example mini tunis mdg
Example: Mini Tunis MDG

Reverse Engineering (Interconnection Styles)


Cluster ing

Aggregate representation of MDG, that groups together modules that are tightly coupled

Clusters represent subsystems

Obtained automatically with Bunch

Clustering

Reverse Engineering (Interconnection Styles)


Example mini tunis after clustering
Example: Mini Tunis after clustering modules that are tightly coupled

Reverse Engineering (Interconnection Styles)


Structure graph

A clustered system may be visualized as a tree modules that are tightly coupled

Edges represent containment, use and style dependencies

Nodes represent modules and subsystems

Easier to visualize large systems

Structure Graph

Reverse Engineering (Interconnection Styles)


Interconnection styles1
Interconnection Styles modules that are tightly coupled

  • Regulate the interactions between modules and subsystems

  • High-level relations not present in source code or clustered system.

  • Can be described formally with the Interconnection Style Formalism (ISF)

Reverse Engineering (Interconnection Styles)


Example export style
Example: Export Style modules that are tightly coupled

  • Export style facilitates the specification of subsystem interfaces.

  • If a subsystem S exports a module M, M belongs to S’s interface.

  • Modules outside of S can use modules belonging to S’s interface.

Reverse Engineering (Interconnection Styles)


Example export style1

M3 can use M4 because it is exported by SS21 and SS21 is exported by SS2.

M6 cannot use M5 because it is not exported by SS21. If M6 did use M5 there would be a stylistic violation.

Example: Export Style

Reverse Engineering (Interconnection Styles)


ISF exported by SS2.

  • Visual notation that allows specification of constraints on configurations of components and dependencies

  • Rules are represented as directed labeled graphs

    • Nodes: modules and subsystems

    • Arrows: dependencies and containment relations

Reverse Engineering (Interconnection Styles)


Isf cont d
ISF (cont’d) exported by SS2.

  • Types of rules:

    • PERMISSION: define the set of well-formed configurations

    • DEFINITION: define new relations based on patterns of software components and relations.

Reverse Engineering (Interconnection Styles)


Isf specification of export style
ISF Specification of exported by SS2.Export Style

Reverse Engineering (Interconnection Styles)


Example mini tunis after edge repair
Example: Mini Tunis exported by SS2.after Edge Repair

Reverse Engineering (Interconnection Styles)


Tool exported by SS2.

  • Style Editor

    • Enables the user to define custom interconnection styles visually

  • Edge Repair Utility

    • Takes structure graph and style and finds the missing structural dependencies automatically

    • Checks if a design satisfies stylistic constraints

Reverse Engineering (Interconnection Styles)


Integration of reverse engineering tools
Integration of Reverse Engineering Tools exported by SS2.

Reverse Engineering (Interconnection Styles)


Techniques
Techniques exported by SS2.

  • Edge Repair

  • Rule Checking

  • Code Generation

Reverse Engineering (Interconnection Styles)


Edge repair

Given exported by SS2.

Structure Graph

Style definition

Edge Repair

Reverse Engineering (Interconnection Styles)


Edge repair1
Edge Repair exported by SS2.

  • Goal: find the missing style dependencies such that:

    • Visibility between modules is minimized

    • No dependency (i.e., use or style) violates any stylistic constraint.

Reverse Engineering (Interconnection Styles)


Algorithms
Algorithms exported by SS2.

  • Huge search space (i.e. cannot try all possible combinations)

  • Optimization methods:

    • Hill climbing: start with a random configuration and find better ones by making small changes

    • Edge removal: start with “full” configuration and remove edges until no better solution can be found

    • Genetic algorithm

Reverse Engineering (Interconnection Styles)


Fitness function
Fitness Function exported by SS2.

  • Measures the quality of a configuration

    • Good:

      • Configurations with a large number of well-formed use relations

    • Bad:

      • Configurations with a large number of ill-formed style dependencies

      • Configurations with high visibility (many see relations)

Reverse Engineering (Interconnection Styles)


Simplistic visibility
Simplistic exported by SS2. visibility

  • Computing visibility is an O(N2) operation

  • Frequent operation

  • Approach: simplistic visibility

    • Approximation to standard visibility

    • Given by the number of style dependencies

    • O(1) operation

  • Drawback: does not work for some styles

    • Non-recursive (permission rules are not defined in terms of other permission rules)

    • Modules are exposed by direct (i.e., non-transitive) relations with their ancestors.

Reverse Engineering (Interconnection Styles)


Fitness function1
Fitness Function exported by SS2.

  • ifu: ill-formed use dependencies

  • ifs: ill-formed style dependencies

  • wfu: well-formed use dependencies

  • wfs: well-formed style dependencies

  • MaxS: maximum number of style dependencies in C

Reverse Engineering (Interconnection Styles)


Hill climbing
Hill Climbing exported by SS2.

  • Start from random configuration of dependencies

  • Select an edge, to add or remove, such that the new configuration is better than the current one

  • Repeat until no better solution can be found

Reverse Engineering (Interconnection Styles)


Edge removal
Edge Removal exported by SS2.

  • Start from full configuration

  • Remove edges that makes the current solution better until no better solution can be found

Reverse Engineering (Interconnection Styles)


Hill climbing vs edge removal

Hill Climbing exported by SS2.

Adds relations and then removes them (might add unnecessary relations)

Edge Removal

Always starts with a full configuration (even if only a few relations are required)

Fewer neighbors to consider as the algorithm advances

Hill Climbing vs. Edge Removal

Reverse Engineering (Interconnection Styles)


Performance hill climbing vs edge removal
Performance: exported by SS2.Hill Climbing vs. Edge Removal

Reverse Engineering (Interconnection Styles)


Genetic algorithm
Genetic Algorithm exported by SS2.

  • Encoding

  • Crossover

  • Fitness function

  • Mutation

Reverse Engineering (Interconnection Styles)


Optimizations
Optimizations exported by SS2.

  • Pessimistic edge reparability: avoid processing relations that can never exist (e.g., export relations between siblings in the Export Style)

  • Simplistic visibility measurement: based on the number of style dependencies in a configuration (reduces O(N2) operation to O(1)).

Reverse Engineering (Interconnection Styles)


Rule checking
Rule Checking exported by SS2.

  • Goal: check well-formedness of a dependency with respect to a permission rule.

  • Can be reduced to a pattern matching problem => the rule is matched to the structure graph.

Reverse Engineering (Interconnection Styles)


Pattern matching
Pattern Matching exported by SS2.

  • Invalid pattern matches:

Reverse Engineering (Interconnection Styles)


Pattern matching algorithm
Pattern Matching Algorithm exported by SS2.

  • Based on Depth-First Search

    • State:

      • Set of fixed nodes

      • Set of free nodes

    • Goal: find a state with no free nodes

    • Initial state: the set of fixed nodes contains the endpoints of the relation being checked

Reverse Engineering (Interconnection Styles)


Pattern matching example
Pattern Matching Example exported by SS2.

Structure Graph

Permission Rule

Reverse Engineering (Interconnection Styles)


Choosing the node to fix
Choosing the Node to Fix exported by SS2.

  • If the node is not connected to a fixed node, it can assume any value (i.e., N possibilities)

  • Choose a node connected to a fixed node to constrain the possible values for the node

Reverse Engineering (Interconnection Styles)


Pessimistic edge reparability algorithm
Pessimistic Edge Reparability Algorithm exported by SS2.

  • Algorithm: based on the pattern matching

    • Full configuration with all dependencies as unknown

    • Repeat until no more unknown dependencies exist

      • Pick a dependency tagged as unknown

      • Check if it is reparable (i.e., perform a pattern match of every related permission rule). If an unknown dependency is found during the match, check its reparability (i.e., recursive call of this algorithm)

      • If a match is found and all involved dependencies are reparable, tag the relation as reparable. If not, tag it as irreparable.

Reverse Engineering (Interconnection Styles)


Code generation
Code Generation exported by SS2.

  • Java code is generated to check each rule

    • Take advantage of Java’s compile-time and run-time optimizations

    • Some decision making is performed when the rule is translated instead of when it is checked

Reverse Engineering (Interconnection Styles)


Code optimization
Code Optimization exported by SS2.

  • Take advantage of the fact that

    • Rules are static

    • Search tree depth is fixed and known for each rule (depends on the number of nodes in the rule).

  • … to determine the order in which rule’s nodes are fixed at translation time.

Reverse Engineering (Interconnection Styles)


Code optimization cont d
Code Optimization (cont’d) exported by SS2.

  • When rules look like trees (most times), topological sorting can give a good ordering of nodes .

Reverse Engineering (Interconnection Styles)


Conclusion
Conclusion exported by SS2.

  • Tool

    • find missing high-level dependencies in a system

    • validate a design against a style specification

  • Further research:

    • Optimization of edge repair algorithm (e.g., using incremental algorithms)

      • Replace the “simplistic visibility” measurement

    • Repairing designs by reclustering.

Reverse Engineering (Interconnection Styles)


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