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Virtual Memory (I)

Virtual Memory (I). Outline. Physical and Virtual Addressing Address Spaces VM as a Tool for Caching VM as a Tool for Memory Management VM as a Tool for Memory Protection Suggested reading: 9.1~9.5. Physical Addressing. Attributes of the main memory

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Virtual Memory (I)

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  1. Virtual Memory (I)

  2. Outline • Physical and Virtual Addressing • Address Spaces • VM as a Tool for Caching • VM as a Tool for Memory Management • VM as a Tool for Memory Protection • Suggested reading: 9.1~9.5

  3. Physical Addressing • Attributes of the main memory • Organized as an array of M contiguous byte-sized cells • Each byte has a unique physical address (PA) started from 0 • physical addressing • A CPU use physical addresses to access memory • Examples • Early PCs, DSP, embedded microcontrollers, and Cray supercomputers

  4. A System Using Physical Addressing Main memory 0: 1: 2: Physical address (PA) 3: CPU 4: 4 5: 6: 7: 8: ... M-1: Data word • Used in “simple” systems like embedded microcontrollers in devices like cars, elevators, and digital picture frames

  5. Virtual Addressing • Virtual addressing • the CPU accesses main memory by a virtual address (VA) • The virtual address is converted to the appropriate physical address

  6. Virtual Addressing • Address translation • Converting a virtual address to a physical address • Requires close cooperation between the CPU hardware and the operating system • HW: the memory management unit (MMU) • Dedicated hardware on the CPU chip to translate virtual addresses on the fly • SW: A look-up table • Stored in main memory • Contents are managed by the operating system

  7. A System Using Virtual Addressing Main memory 0: CPU Chip 1: 2: Virtual address (VA) Physical address (PA) 3: MMU CPU 4: 4100 5: 4 6: 7: 8: ... M-1: Data word • Used in all modern servers, desktops, and laptops • One of the great ideas in computer science

  8. Address Space • Address Space • An ordered set of nonnegative integer addresses • Linear Space • The integers in the address space are consecutive • N-bit address space

  9. Address Spaces Linear address space: Ordered set of contiguous non-negative integer addresses: {0, 1, 2, 3 … } Virtual address space: Set of N = 2n virtual addresses {0, 1, 2, 3, …, N-1} Physical address space: Set of M = 2m physical addresses {0, 1, 2, 3, …, M-1} • Clean distinction between data (bytes) and their attributes (addresses) • Each object can now have multiple addresses • Every byte in main memory: one physical address, one (or more) virtual addresses

  10. Address Space • K=210(Kilo), M=220(Mega), G=230(Giga), T=240(Tera), P=250(Peta), E=260(Exa) 256 255 16 64K-1 4G 4G-1 48 256T-1 16E 16E-1

  11. Why Virtual Memory (VM)? • Uses main memory efficiently • Use DRAM as a cache for the parts of a virtual address space • Simplifies memory management • Each process gets the same uniform linear address space • Isolates address spaces • One process can’t interfere with another’s memory • User program cannot access privileged kernel information

  12. DRAM Disk SRAM Using Main Memory as a Cache

  13. Using Main Memory as a Cache • DRAM vs. disk is more extreme than SRAM vs. DRAM • Access latencies: • DRAM ~10X slower than SRAM • Disk ~100,000X slower than DRAM • Bottom line: • Design decisions made for DRAM caches driven by enormous cost of misses

  14. Design Considerations • Line size? • Large, since disk better at transferring large blocks • Associativity? • Full, to minimize miss rate • Write through or write back? • Write back, since can’t afford to perform small writes to disk

  15. Page • Virtual memory • Organized as an array of contiguous byte-sized cells stored on disk conceptually. • Each byte has a unique virtual address that serves as an index into the array • The contents of the array on disk are cached in main memory

  16. Page • The data on disk is partitioned into blocks • Serve as the transfer units between the disk and the main memory • virtual pages (VPs) • physical pages (PPs) • or page frames Virtual memory Physical memory 0 VP 0 Unallocated 0 PP 0 VP 1 Cached Empty PP 1 Uncached Unallocated Empty Cached Uncached Empty PP 2m-p-1 Cached M-1 VP 2n-p-1 Uncached N-1 Virtual pages (VPs) stored on disk Physical pages (PPs) cached in DRAM

  17. Page Attributes • Unallocated: • Pages that have not yet been allocated (or created) by the VM system • Do not have any data associated with them • Do not occupy any space on disk.

  18. Page Attributes • Cached: • Allocated pages that are currently cached in physical memory. • Uncached: • Allocated pages that are not cached in physical memory.

  19. Page Table • Each allocate page of virtual memory has entry in page table • Mapping from virtual pages to physical pages • From uncached form to cached form • Page table entry even if page not in memory • Specifies disk address • OS retrieves information

  20. Page Table “Cache” Location Data 0 243 Object Name 17 On Disk X • • • • • • 1 105 0: D: 1: J: N-1: X: Page Table

  21. Memory resident page table (physical page or disk address) Virtual Page Number Physical Memory Valid 1 1 0 0 NULL 1 1 0 1 Disk Storage (swap file or regular file system file) 0 1 Page Table PTE0 VP4 PP0 VP1 PP5 PTE9 VP2

  22. Memory 0: 1: Page Table Virtual Addresses Physical Addresses 0: 1: CPU P-1: N-1: Disk Address Translation: Hardware converts virtual addresses to physical addresses via an OS-managed lookup table (page table) Page Hits

  23. Page Faults • Page table entry indicates virtual address not in memory • OS exception handler invoked to move data from disk into memory • current process suspends, others can resume • OS has full control over placement, etc.

  24. Before fault After fault Memory Memory Page Table Page Table Virtual Addresses Physical Addresses Virtual Addresses Physical Addresses CPU CPU Disk Disk Page Faults • Swapping or paging • Swapped out or paged out • Demand paging

  25. disk Disk Servicing a Page Fault (1) Initiate Block Read • Processor Signals Controller • Read block of length P starting at disk address X and store starting at memory address Y Processor Reg Cache Memory-I/O bus I/O controller Memory disk Disk

  26. disk Disk Servicing a Page Fault Processor • Read Occurs • Direct Memory Access (DMA) • Under control of I/O controller Reg Cache Memory-I/O bus (2) DMA Transfer I/O controller Memory disk Disk

  27. disk Disk Servicing a Page Fault • I / O Controller Signals Completion • Interrupt processor • OS resumes suspended process Processor Reg (3) Read Done Cache Memory-I/O bus I/O controller Memory disk Disk

  28. Locality to the Rescue Again! • Virtual memory works because of locality • At any point in time, programs tend to access a set of active virtual pages called the working set • Programs with better temporal locality will have smaller working sets

  29. Locality to the Rescue Again! • If (working set size < main memory size) • Good performance for one process after compulsory misses • If ( SUM(working set sizes) > main memory size ) • Thrashing:Performance meltdownwhere pages are swapped (copied) in and out continuously

  30. Why Virtual Memory (VM)? • Uses main memory efficiently • Use DRAM as a cache for the parts of a virtual address space • Simplifies memory management • Each process gets the same uniform linear address space • Isolates address spaces • One process can’t interfere with another’s memory • User program cannot access privileged kernel information

  31. VM as a Tool for Memory Management • Key idea: each process has its own virtual address space • It can view memory as a simple linear array 0 0 Physical Address Space (DRAM) Virtual Address Space for Process 1: VP 1 VP 2 PP 2 ... N-1 Address translation (e.g., read-only library code) PP 6 0 Virtual Address Space for Process 2: PP 8 VP 1 VP 2 ... ... M-1 N-1

  32. VM as a Tool for Memory Management • Memory allocation • Each virtual page can be mapped to any physical page • A virtual page can be stored in different physical pages at different times 0 0 Physical Address Space (DRAM) Virtual Address Space for Process 1: VP 1 VP 2 PP 2 ... N-1 Address translation (e.g., read-only library code) PP 6 0 Virtual Address Space for Process 2: PP 8 VP 1 VP 2 ... ... M-1 N-1

  33. VM as a Tool for Memory Management • Sharing code and data among processes • Map virtual pages to the same physical page(e.g. PP 6) 0 0 Physical Address Space (DRAM) Virtual Address Space for Process 1: VP 1 VP 2 PP 2 ... N-1 Address translation (e.g., read-only library code) PP 6 0 Virtual Address Space for Process 2: PP 8 VP 1 VP 2 ... ... M-1 N-1

  34. Simplifying Linking and Loading Memory invisible to user code Kernel virtual memory 0xc0000000 • Linking • Each program has similar virtual address space • Code, stack, and shared libraries always start at the same address User stack (created at runtime) %esp (stack pointer) Memory-mapped region for shared libraries 0x40000000 brk Run-time heap (created by malloc) Loaded from the executable file Read/write segment (.data, .bss) Read-only segment (.init, .text, .rodata) 0x08048000 Unused 0

  35. Simplifying Linking and Loading Memory invisible to user code Kernel virtual memory 0xc0000000 • Loading • execve() allocates virtual pages for .text and .data sections = creates PTEs marked as invalid • The .text and .data sections are copied, page by page, on demand by the virtual memory system User stack (created at runtime) %esp (stack pointer) Memory-mapped region for shared libraries 0x40000000 brk Run-time heap (created by malloc) Loaded from the executable file Read/write segment (.data, .bss) Read-only segment (.init, .text, .rodata) 0x08048000 Unused 0

  36. Why Virtual Memory (VM)? • Uses main memory efficiently • Use DRAM as a cache for the parts of a virtual address space • Simplifies memory management • Each process gets the same uniform linear address space • Isolates address spaces • One process can’t interfere with another’s memory • User program cannot access privileged kernel information

  37. VM as a Tool for Memory Protection • Extend PTEs with permission bits • The same physical page has different permission for different process Physical Address Space SUP READ WRITE Address Process i: VP 0: No Yes No PP 6 VP 1: No Yes Yes PP 4 PP 2 VP 2: Yes Yes Yes PP 2 • • • PP 4 PP 6 SUP READ WRITE Address Process j: PP 8 No Yes No PP 9 VP 0: PP 9 Yes Yes Yes PP 6 VP 1: PP 11 No Yes Yes PP 11 VP 2:

  38. VM as a Tool for Memory Protection • Page fault handler checks these before remapping • If violated, send process SIGSEGV (segmentation fault) Physical Address Space SUP READ WRITE Address Process i: VP 0: No Yes No PP 6 VP 1: No Yes Yes PP 4 PP 2 VP 2: Yes Yes Yes PP 2 • • • PP 4 PP 6 SUP READ WRITE Address Process j: PP 8 No Yes No PP 9 VP 0: PP 9 Yes Yes Yes PP 6 VP 1: PP 11 No Yes Yes PP 11 VP 2:

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