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Challenges in Concurrent Computing. Danny Hendler. Moore’s law Exponential growth in computing power. The Future of Computing. Speeding up uni-processors is harder and harder Intel, Sun (RIP), AMD, IBM now focusing on “multi-core” architectures Already, multiprocessors are everywhere:

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moore s law exponential growth in computing power
Moore’s lawExponential growth in computing power

סמינר מצטיינים, 20 למאי 2012

slide4

The Future of Computing

  • Speeding up uni-processors is harder and harder
  • Intel, Sun (RIP), AMD, IBM now focusing on “multi-core” architectures
  • Already, multiprocessors are everywhere:
    • Desktops
    • Laptop
    • Smart phones
    • Smart TVs
    • ...?

How can programmers write correct, efficient and scalable algorithms for multiprocessors?

סמינר מצטיינים, 20 למאי 2012

slide6

Synchronization alternatives: coarse-grained locks

  • Pros
  • Easy to program
  • Cons
  • Sequential

סמינר מצטיינים, 20 למאי 2012

slide7

Synchronization alternatives: fine-grained locks

  • Pros
  • Potentially scalable
  • Cons
  • Difficult to program correctly
    • Deadlock
    • Priority inversion
    • Convoying
  • Locks do not compose

סמינר מצטיינים, 20 למאי 2012

slide8

Synchronization alternatives: nonblocking synchronization

  • Various progress guarantees
    • Wait-freedom,
    • Lock-freedom
    • Obstruction-freedom
  • Generally requires strong synchronization

compare-and-swap

Load-link/store-conditional

Swap, fetch-and-add

  • Pros
  • Potentially scalable
  • Avoids lock-based hazards
  • Cons
  • Extremely difficult to program

סמינר מצטיינים, 20 למאי 2012

slide9

Synchronization alternatives: Transactional Memory

  • A (memory) transaction is a sequence of memory reads and writes executed by a single thread that either commits or aborts
  • If a transaction commits, all the reads and writes appear to have executed atomically
  • If a transaction aborts, none of its operations take effect
  • Transaction operations aren\'t visible until they commit (if they do)

To be supported soon in hardware by Intel and IBM processors

סמינר מצטיינים, 20 למאי 2012

slide11

Talk outline

  • Introduction
  • Non-blocking algorithms (separate presentation)
  • Randomized mutual exclusion (separate presentation)
  • Research directions

סמינר מצטיינים, 20 למאי 2012

slide12

Talk outline

  • Introduction
  • Non-blocking algorithms (separate presentation)
  • Randomized mutual exclusion (separate presentation)
  • Research directions

סמינר מצטיינים, 20 למאי 2012

slide13

Talk outline

  • Introduction
  • Non-blocking algorithms (separate presentation)
  • Randomized mutual exclusion (separate presentation)
  • Research directions

סמינר מצטיינים, 20 למאי 2012

slide14

Research directions: practical

  • Devising efficient implementations of transactional memory
    • Includes incorporating OS kernel support
  • Devising efficient and scalable lock-based and non-blocking data structures
    • Some find their way to Java libraries
  • Devising algorithms that use few barrier instructions
  • ...

סמינר מצטיינים, 20 למאי 2012

slide15

Research directions: theoretical

  • Lower bounds and impossibility results on deterministic and randomized mutual exclusion
  • Lower bounds and impossibility results on concurrent data-structures\' (counters, stacks, queues, ...) complexity according to various metrics.
  • Formulating novel realistic metrics for concurrent algorithms and corresponding upper/lower bounds

סמינר מצטיינים, 20 למאי 2012

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