Development of a Software Radio Based Reconfigurable Intersatellite Crosslink Testbed

1. Development of a Software Radio Based Reconfigurable Intersatellite Crosslink Testbed Jason A. Soloff Microwave & Communication Systems Branch Goddard Space Flight Center Bernard L. Edwards Microwave & Communication Systems Branch Goddard Space Flight Center Scott D. Hoy Lockheed Martin Goddard Space Flight Center Soloff E7 1

2. Justification for Crosslink Technology Intersatellite Crosslinks enable: • Intersatellite data relay (TDRSS, MILSTAR, Iridium) • Constellation geometry & metrology (position, time transfer) • Autonomous navigation • Formation flight (distributed science, C&DH, GN&C) These capabilities are all required to enable missions in NASA’s roadmap

3. Justification for an Intersatellite Crosslink Testbed • Future NASA missions based on constellation and distributed spacecraft architectures require: • Autonomous formation flight • Distributed on-orbit science data processing • Distributed constellation control algorithms • Future missions in NASA’s roadmap require advanced communication and space-to-space crosslink technologies to support these technologies • NASA needs an independent ability to develop and evaluate advanced crosslink technologies in order to enable advanced mission concepts.

4. Justification for an Intersatellite Crosslink Testbed • Goddard’s Intersatellite Crosslink Testbed… • Enables investigation into software reconfigurable communication technologies (software radio) • Enables development and evaluation of crosslink signaling and data transfer protocols • Assists in the evaluation of in-house and industry crosslink capable communication system hardware • Supports mission planning, spacecraft systems engineering processes, and mission operations concept development • Allow NASA to support crosslink technologies at the theoretical, hardware, system and mission levels.

5. The Intersatellite Crosslink Testbed • The Intersatellite Crosslink Testbed is: • A physical laboratory based on software defined radio and DSP platforms enabling low cost evaluation of multiple crosslink technologies • System and algorithm modeling software enabling rapid prototyping and simulation of signals, protocols and communication algorithms • A team of engineers with knowledge of • Communication system design • Modulation and signaling schemes • Wireless networking • Digital signal processing • FPGA / hardware engineering • RF / IF engineering The combination of engineering expertise, flexible hardware test platforms and advanced rapid development tools allows support of NASA’s crosslink requirements

6. Testbed Architecture • Principal Requirements • Support up to three simulated “spacecraft” • for crosslink testing in constellation mission scenarios • Software radio techniques will be used • Signaling at IF (70 MHz) • Low “cost of iteration” • COTS hardware & software tools • Testbed Hardware Architecture • Three identical DSP/SDR platforms • Ethernet connection to PC for system • control and baseband data • Migration path to new technologies and to • include additional capabilities in the testbed • Testbed Software Architecture • System level visual & algorithmic simulation tools • Industry standard programming languages • Industry standard compilers, synthesizers, etc…

7. Testbed Laboratory Architecture

8. Satellite Simulator Hardware Architecture • Selected COTS Hardware: • Spectrum Signal Processing SDR-3000 • Single integrated platform • Industry standard cPCI form factor • VxWorks Operating System • 4x 80MSPS ADCs • 4x 160MSPS DACs • 4x Xilinx Virtex II FPGA • 2x 500MHz PowerPC • 2x IBM405GP PowerPC • Data routing: • 400MB/s “nearest neighbor” • FPGA-FPGA pathways • 640MB/s inter-module • switched packet routes • Provides “turnkey” DSP/SDR • development platform.

9. Testbed Software Selection • Chose to use only commercial tools & methods: • System Level Analysis & Simulation • The MathWorks’ MATLAB & Simulink • FPGA / Hardware Implementation • VHDL selected as standard HDL • Xilinx ISE synthesis, place & route • Mentor Graphics’ ModelSim behavioral VHDL simulation • Xilinx System Generator automated HDL generation • PowerPC Implementation • C selected as standard processor language • WindRiver VxWorks OS packaged with SDR-3000 • WindRiver Tornado IDE compiler & debugger

10. Testbed Implementation • The established Testbed & Crosslink Development Lab consist of: • 3x SDR-3000 DSP systems • IF filters / combiner circuits • VxWorks host/development PC • Dual Xeon FPGA/simulation workstation • Internal lab Ethernet network • Ethernet gateway to GSFC CNE • Spectrum Analyzer • Digital sampling oscilloscope • with software n-PSK demodulation • BER test set • Vector signal generator

11. Testbed Technical Development • Technical development during FY03 consisted of the following: • 6 MBit/sec QPSK Demodulator • Verified operation of the SDR-3000 system at the required data rates • Produced a decision directed 6 MBit demodulator functioning at 70 MHz IF • Implemented with “traditional” FPGA tools & methods (manual VHDL coding, • synthesis, simulation and place & route) • 6 MBit/sec QPSK Modulator • Implemented using project’s rapid development tools (Simulink / System Generator) • Development process consisted of continuous-time Simulink modeling, • generation of discrete-time Simulink model, and generation of synthesizable • VHDL code using System Generator

12. QPSK Modulator – Simulation Results • Discrete time modulator was simulated • using MATLAB/Simulink to produce the • following time and frequency domain • results QPSK Modulator Simulation Carrier Components QPSK Modulator Simulation Spectrum Output

13. DT QPSK Modulator – Testbed Results • DT QPSK Modulator model was converted to FPGA implementation using VHDL rapid development tool flow • MATLAB / Simulink • Xilinx System Generator • VHDL Code • ISE Foundation (synthesis / place & route) • BER test set used to generate 6 Mbps data stream w/ known error rates • Measurements made on oscilloscope and spectrum analyzer

14. SDR QPSK Modulator – Testbed Results Software demodulation inside the digital oscilloscope was used to observe recovered symbols and data bits. Measurements with BERT indicated no additional bit errors are introduced with the SDR based modulator at 6 Mbps Channel Filtered QPSK Simulated Spectrum True Spectrum

15. DT QPSK Modulator – Testbed Results Software demodulation inside the digital oscilloscope was used to observe recovered symbols and data bits. Measurements with BERT indicated no additional bit errors are introduced with the SDR based modulator at 6 Mbps Constellation Plot of Recovered I&Q Eye Pattern of Recovered I&Q

16. FDMA Crosslink Simulator • Developed an IP based FDMA • intersatellite crosslink simulator. • ALOHA “based” • Common “hailing” frequency • Hailing traffic is TDMA half-duplex • Negotiated “data link” channel pairs • Channel pairs are full-duplex • TCP/IP & UDP/IP over HDLC • messaging & data links • 100kbps / data link channel • Protocol simulations developed & implemented on multiple Linux PCs • Protocol & link establishment code resident in PowerPCs • Modulators & Demodulators resident in FPGA

17. Satellite Simulator Functional Architecture

18. FDMA Crosslink • Each simulated s/c transceiver has • 5 simultaneous TX channels • 5 simultaneous RX channels • CH0 is assigned as the half-duplex shared hailing channel • Remaining channels are assigned in channel pair sets cooresponding to data links

19. Testbed Future Work (FY04) • Planned tasks in FY04: • Develop additional communication algorithms and protocols of increasing • complexity • Integrate Intersatellite Crosslink Testbed with GSFC Formation Flying • Test Bed (FFTB) • Construct a real-time “Crosslink Channel Simulator” to support introduction • of real-time flight dynamics, Doppler, antenna patterns and mission • navigation into the simulation environment • Begin supporting mission planners by providing access to the Intersatellite • Crosslink Testbed in the form of mission concept simulations