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CMS FED Testing. Update 28-06-2002 M. Noy & J. Leaver Imperial College Silicon Group. DAC Evaluation board. LVDS. UTP. LVTTL. SEQSI. UTP. VME. Opto-Tx. I2C control. I2C master. Optical Fibre. 8 bit oscilloscope. Coax. Opto-Rx. GPIB. PC. CMS FED Testing. Currently:.

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Cms fed testing

CMS FED Testing

Update 28-06-2002

M. Noy & J. Leaver

Imperial College

Silicon Group

DAC Evaluation board








I2C control

I2C master

Optical Fibre

8 bit oscilloscope





CMS FED Testing


Line driver + (optional) level shift


I2C slave


CMS FED Testing

Picture of the DAC evaluation board


Line driver

LVTTL data in, from level converter

UTP out

CMS FED Testing

Picture of the key link components

UTP from DAC/line driver

Optical fibre



Single ended output to scope






CMS FED Testing


DAC Evaluation Board

Line driver






CMS FED Testing

Signal before the link

200mV (V+-V- =400mV) differential signal with no offset.

higher bandwidth  ringing and faster rise/fall time.

Time scale is relative to the scope trigger point on all plots.

CMS FED Testing

Signal after the link

Single ended, with offset.

No ringing but slower

rise/fall times

CMS FED Testing

Signal noise/jitter after the link

Note:no scale on the width of the line. This is an impression of the infinite persistence scope trace => spread unknown.

(Measurements are real).

CMS FED Testing

Rise time, 10% to 90% of full scale.

CMS FED Testing

Fall time 90% to 10% of full scale

CMS FED Testing

Linearity: link is being operated in the linear region of the Tx/Rx

Settings: x0, x1, x2, x3, x4, x5=0,0,0,0,1 (recommended by CERN)

000 01

CMS FED Testing

Sample APV25 pair of multiplexed frames with simulated 1 MIP signal

CMS FED Testing

Multiplexed APV25 header with zero pipeline address

2 error bits


address (16 bits)

2x12x25ns bits =

6 start bits

CMS FED Testing

Zoom in of the 1 MIP signal upon its pedestal

  • Approx:

  • Pedestal value here is 509 lsbs, 4096 levels in 405mV0.099mV/lsb

  • 1 MIP  4096/8=512 lsbs

  • Total signal


CMS FED Testing

Temperature Control

We attached a heating element and a thermocouple to the laser package and used the following PID equation to stabilise the temperature through a feedback loop.

W = P [ (Ts - T0) + D d (Ts- T0) /dt + I  (Ts - T0)dt]

The temperature was varied between 30ºC and 40ºC in ~1ºC steps. The output of the Rx was recorded after a stabilisation time, for some measurement time.

CMS FED Testing

Temperature Measurements

Laser threshold bias current behaves like


Which implies


And (after a few lines and other things!)

Vout  -Reff G Rx l Ith T/T0

Typical parameter values yield an expected (@ 34.1°C)

Vout/T -90.8 mV/°C

CMS FED Testing

Temperature Measurement Results

Approximated with a linear fit V=mT+C

Where m = -(89.8  1.8) mV/°C

and C = (4137  62) mV

Good agreement with expected value (of 90.8mV/°C), but some of the parameters are loosely defined

CMS FED Testing

Temperature Measurement Errors

Temperature stabilisation is good, with random fluctuations of the order 0.02°C. There is some unknown systematic error, that does not exceed 0.44°C.

Have statistics of 150x500 voltage points and 150 temperature points per temperature setting.

Statistical errors are too small to account for the largest random deviation, probably spurious.

We could repeat the whole measurement again using smaller T steps, but probably won’t due to time constraints.

CMS FED Testing


Have a complete working single fibre, possible to drive 4 with identical signals using the current Opto-Tx.

Possible to obtain a further 2 of the 4 channel prototypes from CERN  complete 12 channels could in principle be driven with identical signals.

Dependence of laser operation on temperature is now better understood, and fine temperature control is possible. We feel confident that a system such as the one we have will allow sufficient temperature stability for the fed testing needs.

Work is in progress to produce an application specific version of the SEQSI

simpler operation

longer RAM pipeline

clean/synchronous stop from VME

possible stepping through

CMS FED Testing

Future Work

Have 1 (untested) Opto-Rx emulator to drive the analogue stage of the FED directly over copper (I.e. eliminating the optical link)

Verify DAC Linearity: Summer student(?)

More thought into a test vectors and their comparison with the FED output