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CHAPTER 5 – Computing Components . CS 10051. Professor: Johnnie Baker Computer Science Department Kent State University. Supplementary Slides for Class. These slides were developed for the material in our Chapter 5 using an alternate textbook.

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Chapter 5 computing components

CHAPTER 5 – Computing Components

CS 10051

Professor: Johnnie Baker

Computer Science Department

Kent State University


Supplementary slides for class
Supplementary Slides for Class

  • These slides were developed for the material in our Chapter 5 using an alternate textbook.

  • The primary slides for Chapter 5 cover material not covered in these slides.

  • The animation slides included here work better than these same slides work in the primary slides for Ch. 5

  • In order to see the animation, you must choose “slide show” format under “View”.

  • Studying all of these slides should aid you in understanding Chapter 5.

  • A reasonable number of these slides have been added to our primary slides in Chapter 5.


The von neumann architecture of a computer
The von Neumann Architecture of a Computer

Processor or

Note: The processor is also called the Central Processing Unit or the CPU


Flow of information
Flow of Information

  • The parts are connected to one another by a collection of wires called a bus

Processor

Figure 5.2 Data flow through a von Neumann architecture


Von neumann architecture
Von NeumannArchitecture

There are 3 major units in a computer tied together by buses:

1) MemoryThe unit that stores and retrieves instructions and data.

2) Processor: The unit that houses two separate components:

The control unit: Repeats the following 3 tasks

Fetches an instruction from memory

Decodes the instruction

Executes the instruction

The arithmetic/logic unit (ALU): Performs mathematical and logical operations.

3) Input/Output (I/O) Units: Handle communication with the outside world.


Von Neumann Architecture

The architecture is named after the mathematician, John von Neumann, who supposedly proposed storing instructions in the memory of a computer and using a control unit to handle the fetch-decode-execute cycle:

fetch an instruction

decode the instruction

execute the instruction

Although we think of data being stored in a computer, in reality, both data and instructions are stored there.

In one of our programming chapters, we’ll see the format of a typical instruction. Right now, think of it as a sequence of 0s and 1s.


Babbage
Babbage

Interestingly, a similar architecture was proposed in 1830 by Charles Babbage for his Analytic Engine:

ALU mill

memory store

control unit operator (process cards storing instructions)

I/O units output (typewriter)



Memory
Memory

  • Memory is a collection of cells, each with a unique physical address

  • The size of a cell is normally a power of 2, typically a byte today.


Memory1
Memory

  • A cell is the smallest addressable unit of memory – i.e. one cell can be read from memory or one cell can be written into memory, but nothing smaller.


Ram and rom
RAM and ROM

  • RAM stands for Random Access Memory

    • Inherent in the idea of being able to access each location is the ability to change the contents of each location

  • ROM stands for Read Only Memory

    • The contents in locations in ROM cannot be changed

  • RAM is volatile, ROM is not

    • This means that RAM does not retain its bit configuration when the power is turned off, but ROM does


Memory unit or ram random access memory
MEMORY UNIT (or RAM- Random Access Memory)

Each cell has an address, starting at 0 and increasing by 1 for each cell.

A cell with a low address is just as accessible as one with a high address- hence the name RAM.

The width of the cell determines how many bits can be read or written in one machine operation.

MAR is Memory Address Register

MDR is Memory Data Register


What is a register
What is a Register?

  • Data can be moved into and out of registers faster than from memory.

  • If we could replace all of memory with registers, we could produce a very, very fast computer ...

  • But, the price would be terribly prohibitive.

  • Most computers have quite a few registers that serve different purposes.

  • We’ll see how the MAR and the MDR are used.


How does the memory unit work
How does the memory unit work?

Trace the following operation:

s

Store data D in memory location 0.

0

0

D

D

0

D

D

D


How does the memory unit work1
How does the memory unit work?

Trace the following operation:

f

1) Fetch data D from memory location 1.

2) Obtain an instruction I from memory

location 7.

D

1

How does the computer distinguish

between 1) and 2) above?

D

I

We need to look at the control unit later.


Using the decoder circuit to select memory locations

MAR

0

1

2

3

4

5

6

7

15

0 1 1 1

USING THE DECODER CIRCUIT TO SELECT MEMORY LOCATIONS

0

4 x 24 decoder

0

1

0

0


The decoder circuit doesn't scale well--- i.e. as the number of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

Most computers today have an MAR of 32 bits. Thus, if the memory was laid out as we showed it, we would need a 32 x 232 decoder!

Note 232 is 22 230 = 4 G

So most memory is not 1 dimensional, but 2-dimensional (or even 3-dimensional if banked memory is used).


2 d memory

MAR of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

0 1 1 1

2-D MEMORY

Note that a 4 x 16decoder was used for the 1-D memory.

2 x 4

decoder

columns

2 x 4

decoder

rows


Arithmetic logic unit alu
Arithmetic/Logic Unit (ALU) of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

  • Performs basic arithmetic operations such as adding

  • Performs logical operations such as AND, OR, and NOT

  • Most modern ALUs have a small amount of registers where the work takes place.

  • For example, adding A and B, we might find A stored in one register, B in another, and their sum stored in, say, A, after the adder computes the sum.


The alu uses a multiplexer
The ALU Uses a Multiplexer of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

R

Register R

Other registers

AL1

ALU

AL2

condition code register

circuits

GT EQ LT

multiplexer

output

selector lines


Add x
ADD X of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

f

D

E+D

E

X

ADD X

E

D

E+D

ALU1 & ALU2

D

E+D


Control unit
Control Unit of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

  • A Control Unit is the unit that handles the central work of the computer.

  • There are two registers in the control unit

    • The instruction register (IR) contains the instruction that is being executed

    • The program counter (PC) contains the address of the next instruction to be executed

  • The ALU and the control unit together are called the Central Processing Unit, or CPU


All a computer does is
ALL A COMPUTER DOES IS ... of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

  • Repeat forever (or until you pull the plug or the system crashes)

  • 1) FETCH (the instruction)

  • 2) DECODE (the instruction)

  • 3) EXECUTE (the instruction)


The fetch execute cycle
The Fetch-Execute Cycle of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

  • Fetch the next instruction

  • Decode the instruction

  • Execution Cycle

    • Gets data if needed

    • Execute the instruction

Normally “Get data if needed” is considered part of the “Execute the instruction”.


Figure 5 3 the fetch execute cycle
Figure 5.3 of bits in the MAR increases, the number of output lines for the decoder goes up exponentially. The Fetch-Execute Cycle

(a)

(3)

(b)


How does the control unit work
How Does the Control Unit Work? of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

Once the instruction is fetched, the PC is incremented.

The PC holds the address of the next instruction to be executed.

Whatever is stored at that address is assumed to be an instruction.


Input output units
Input/Output Units of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

  • An input unit is a device through which data and programs from the outside world are entered into the computer

    • Keyboard, the mouse, and scanning devices

  • An output unit is a device through which results stored in the computer memory are made available to the outside world

    • Printers and video display terminals


The i o devices
THE I/O DEVICES of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

Pictorially, these look the simplest, but in reality, they form the most diverse part of a computer.

Includes:

keyboards, monitors, joysticks, mice, tablets, lightpens, spaceballs, ....


I o units
I/O UNITS of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

Memory

Processor

I/O buffer

Each device is different, but most are interrupt driven.

This means when the I/O device wants attention, it sends a signal (the interrupt) to the CPU.

Control-logic

I/0 device


IN X of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

s

D

X

D

IN X

D


Out x
OUT X of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

f

D

X

D

OUT X

D


Problem trace following actions inside computer
Problem: Trace Following Actions inside Computer of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

  • Increment X

  • Compare X

  • Jump X

  • JumpLT X


Secondary storage devices
Secondary Storage Devices of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

  • Because most of main memory is volatile and limited, it is essential that there be other types of storage devices where programs and data can be stored when they are no longer being processed

  • Secondary storage devices can be installed within the computer box at the factory or added later as needed


Magnetic tape
Magnetic Tape of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

  • The first truly mass auxiliary storage device was the magnetic tape drive

A magnetic tape


Magnetic disks
Magnetic Disks of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

  • A read/write head travels across a spinning magnetic disk, retrieving or recording data

Figure 5.8The organization of a magnetic disk


Compact disks
Compact Disks of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

  • A CD drive uses a laser to read information stored optically on a plastic disk

  • CD-ROM is Read-Only Memory

  • DVD stands for Digital Versatile Disk


Are all architectures the von neumann architecture
Are All Architectures the von Neumann Architecture? of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

  • No.

  • One of the bottlenecks in the von Neuman Architecture is the fetch-decode-execute cycle.

  • With only one processor, that cycle is difficult to speed up.

  • I/O has been done in parallel for many years.

  • Why have a CPU wait for the transfer of data between the memory and the I/O devices?

  • Most computers today also multitask – they make it appear that multiple tasks are being performed in parallel (when in reality they aren’t as we’ll see when we look at operating systems).

  • But, some computers do allow multiple processors.


Synchronous processing
Synchronous processing of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

  • One approach to parallelism is to have multiple processors apply the same program to multiple data sets

Figure 5.6 Processors in a synchronous computing environment


Pipelining
Pipelining of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

  • Arranges processors in tandem, where each processor contributes one part to an overall computation

Figure 5.7 Processors in a pipeline


Shared memory
Shared-Memory of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

Shared Memory

Processor

Processor

Processor

Processor

Local

Memory2

Local

Memory3

Local

Memory4

Local

Memory1

Different processors do different things to different data.

A shared-memory area is used for communication.


Comparing various types of architecture
Comparing Various Types of Architecture of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

  • Typically, synchronous computers have fairly simple processors so there can be many of them – in the thousands.

  • Pipelined computers are often used for high speed arithmetic calculations as these pipeline easily.

  • Shared-memory computers basically configure independent computers to work on one task. Typically, there are something like 8, 16, or at most 64 such computers configured together.


Comparing various types of architecture a simple example
Comparing Various Types of Architecture – a simple example of bits in the MAR increases, the number of output lines for the decoder goes up exponentially.

  • Solve the following problem:

    • Given n integers, see if the integer k is in the collection

  • Do this with a von Neumann machine.

  • Do this with a synchronous machine.

  • Do this with a pipelined machine.

  • Do this with a shared-memory machine.


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