Buses in a graphics context
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Buses in a Graphics Context:. PCI vs. AGP. Context: Why use a specialized bus?. Given: I/O takes a significant amount of time, esp. Graphics I/O. If Graphics I/O moves into separate bus, system buses freed up for other devices.

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Buses in a graphics context

Buses in a Graphics Context:

PCI vs. AGP


Context why use a specialized bus

Context: Why use a specialized bus?

  • Given: I/O takes a significant amount of time, esp. Graphics I/O.

  • If Graphics I/O moves into separate bus, system buses freed up for other devices.

  • Why use a specialized graphics bus (e.g. AGP) over a universal bus (e.g. PCI)?


Features what is a bus

Features: What is a Bus?

  • A way of connecting multiple devices together so that data can be transferred between them

  • Shared by multiple devices --> Only 1 device can send at any particular time

  • Has multiple lines each transferring a single bit. # of lines known as bus width

  • Different types of lines: control, address, and data

  • Multiplexed

  • Buses can be synchronous or asynchronous


Buses in a graphics context 3a

PCI

  • Intro

    • Created in 1992 - replaced ISA.

    • Solved many technical issues of ISA bus

      • IRQ

      • Address conflicts (jumpers)

    • Features Plug-and-Play technology

    • Because of high speed data transfer only 3-4 devices can be plugged into one PCI bus, as opposed to 6-7 on ISA board.

    • Two PCI buses can be connected with PCI-to-PCI bridges

    • These bridges divide into primary and secondary bridges and are physically isolated.


Pci cont d

PCI (cont’d)


Pci cont d1

PCI (cont’d)

  • Technical Attributes

    • PCI supports up to 64 bit data transfer and 133MHz clock which allows for transfer of 1066 megabytes per second.

    • Features direct memory access (DMA)

    • Bus arbitration: Fair, Round Robin, Master Capable

    • Several pins on the bus are selected to implement bus mastering

      • any device can take over the control of the bus at any time

      • if possible, one device may occupy the whole bandwidth


Pci cont d2

PCI (cont’d)

  • Interrupts:

    • Interrupts are not synchronized with other signals on the bus, since they can be activated and used at any time.

    • PCI design does not specify how interrupts are to be shared – this is resolved by motherboard manufacturers.


Buses in a graphics context 3a

AGP


Agp cont d

AGP (cont’d)

  • Higher throughput, both peak and sustained

    • Transferring data on rising and falling edges of clock ticks

    • Uses demultiplexed data and address lines

    • Sideband addressing allows pipelining (i.e. Sending requests while receiving data

    • High peak throughput of 533 MB/s on 32 data lines


Agp cont d1

AGP (cont’d)

  • Memory access improvements

    • Direct Memory Execution (DIME)

    • Uses system memory as own, using GART

    • Allows concurrent system memory usage

    • Saves money on expensive graphics memory

    • Useful for on-board graphics


Comparison

PCI

Address/data multiplexed

Non-pipelined

Peak at 133MB in 32 bits

Multi-target, single master

Connects to multiple peripherals besides memory I/O

AGP

Address/data de-multiplexed

Pipelined requests

Peak at 533MB/s in 32 bits

Single target, single master - makes DIME possible

Memory read/write only, no other I/O operations

Comparison


Comparisons cont d

Comparisons (cont’d)

  • Data Transfers

    • AGP makes multiple requests for data during a bus or memory access.

    • PCI makes one request, and does not make another until the data it request has been transferred.

  • AGP does not replace the PCI bus, but it is a dedicated connection that can used only by the graphics subsystem


Conclusions

Conclusions

  • AGP is faster

  • PCI is more flexible


Bibliography

Bibliography

  • AGP Information:

    • [email protected] PCI Information. http://home.hyperlink.net.au/~chart/program.htm#agp (Feb. 2003).

    • Intel Corporation. Accelerated Graphics Port Technology Home. http://www.intel.com/technology/agp/ (Feb. 2003).

  • General Bus Information:

    • Kozierok, Charles M. The PC Guide. http://www.pcguide.com/ (Feb 2003).

    • Stallings, William. Computer Organization and Architecture: Designing for Performance. 5th ed. New Jersey: Prentice Hall, 2000.

  • PCI Information:

    • Adaptec, Inc. Adaptec: A Fundamental Element of the PCI Architecture is the Concept of Bridges. http://www.adaptec.com/worldwide/support/supporteditorial.html?sess=no&language=English+US&prodkey=PCI_bridge_whitepaper (Feb. 2003).

    • Apple Computer, Inc. PCI Bus Overview1. http://developer.apple.com/techpubs/hardware/DeviceManagers/pci_srvcs/pci_cards_drivers/PCI_BOOK.5.html (Feb. 2003).

    • Quatech, Inc. PCI Bus Overview. http://www.quatech.com/Application_Objects/FAQs/comm-over-pci.htm (Feb 2003).

    • Sundance Multiprocessor Technology Ltd. & Sundance Italia S.r.l & Sundance DSP Inc., E&OE. A brief description of the PCI Bus. http://www.sundance.com/edge/files/pci.htm (Feb. 2003).


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