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Pulsar Status

Pulsar Status. For Peter. CDF L2 legacy decision Crate. Technical requirement: need a FAST way to collect/process many inputs… With the technology available back then (1990s), had to design custom (alpha) processor & backplane (magicbus) …

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Pulsar Status

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  1. Pulsar Status For Peter

  2. CDF L2 legacy decision Crate • Technical requirement: need a FAST way to collect/process manyinputs… • With the technology available back then (1990s), had to design custom (alpha) processor & backplane (magicbus) … • had to deal with the fact that each data input was implemented in a different way … • 6 different types of custom interface boards + custom processor & backplane … L 1 electron Magic Bus Input: up to 50KHz TR ACK S V T C L U S TER P H O TO N M U O N α CPU L2 decision crate Output: 300Hz L2 decision crate

  3. Pulsar is designed to be: Modular, universal & flexible, fully self-testable (board &system level) Has ALL interfaces L2 decision crate has Personality cards user defined interfaces Spare lines Standard link another Pulsar or S-LINK to PCI one for all and all for one SRAMs RF clock Gigabit Ethernet All interfaces are bi-directional (Tx & Rx) Lego-style, open design … “In God we trust, everything else we test”

  4. Pulsar (Pulser And Recorder) Design  modular/universal/self-testable Custom mezzanine Mezzanine slots AUX card • S-LINK • PCI • GbE Pulsar works up to 100MHz Top view Bottom view Pulsar design philosophy: able to interface with any user data with any link format (e.g. S-LINK or GbE) via mezzanine Many applications within & outside CDF (compatible with Atlas)

  5. Pulsar based new L2 decision Pulsar pre-processors L1 muon L1 XTRP L1 trigger Muon Merger TS PC L2toTS Cluster SLINK L2 CAL (CLIST/Iso) PreFred SVT SVT Electron ShowMax (RECES) • Commissioning strategy: • Use Tx  Rx in teststand • Split all input signals, run • parasitically with real system Merger

  6. System Integration: two main efforts  one between the two: SLINK fibers Pulsar pre-processors L1 muon L1 XTRP L1 trigger Muon Merger TS PC L2toTS Cluster SLINK L2 CAL (CLIST/Iso) PreFred SVT SVT Electron ShowMax (RECES) Trigger Room with beam Teststand Room Standalone Merger

  7. Main tasks for the project • Hardware: custom: Pulsar, mezzanine cards, AUX, LVDS splitter commercial: fiber splitter, SLINK mezzanine, SLINK-PCI cards, Linux processors • Firmware: transmitters and receivers for all data paths SLINK merger and L2 to trigger supervisor interfaces  about 14 different types of Pulsar firmware • Software: board testing, VME DAQ readout, online/offline monitoring, infrastructure software for decision PC and L2 algorithm… • Beam tests: beam tests  monitoring  firmware fine tuning

  8. Main tasks: current status • Hardware: all hardware production/testing finished all custom hardware: no revision/blue wire on all prototypes RunIIa L2 muon Pulsar running in system since Sept.03 12 Pulsar as SVT road warrior running in system since June 04 • Firmware:  all firmware in place and fine tuning starts key to success: design for uniformity/modularity, CVS control, dedicated firmware developers (eng. students) • Software:  core software in place and fine tuning starts • Beam tests:  started last month beam tests  monitoring  firmware/software fine tuning

  9. Pulsar to PC round trip timing measurement

  10. Mini-DAQ with L2 trigger in test stand room Pulsar (L2TS) Pulsar Merger Tx RXPT TXPT TS FRED (GL1) L2 Trigger Data PC TS L1A (SLINK fiber) preFRED (SLINK fiber) L2 Trigger Decision + TL2D Bank (Phase I) TS handshaking (sending L2A/R, ROL, Buffer #) L2TS Pulsar

  11. Summary: we are in good shape • All custom hardware production&testing finished • All commercial hardware in hand and tested, tested new Linux PC and performance is excellent • All firmware for 14 types of Pulsar in place and fine tuning on going • All software for board testing, VME DAQ readout working; core online/offline software in place • All core software for decision/control PCs and algorithm in place, ready for system integration • Beam tests with real system in parasitic mode started • Our target is to test as much as possible of the new system in parasitic mode with beam before Aug. 2004 shutdown

  12. Pulsar production delivery time vs upgrade needs Time 06/04 01/05 07/05 10/05 Build 45 40? L2 Decision 9 (system) + 6 spare +15 (teststand Tx  Rx) SVT 12+3 +10 +14 + 6 spare XFT 5 + 2 spare

  13. Board typeDescription Firmware 081          L2 Pulsar Muon/XTRP Rx IIa083          L2 Pulsar SVT Road Warrior085          L2 Pulsar Muon/XTRP/L1 Tx or SVT XTRP-emu086          L2 Pulsar Muon/XTRP/L1 Rx IIb087          L2 Pulsar RECES Tx088          L2 Pulsar RECES Rx089          L2 Pulsar Cluster/PreFred Tx090          L2 Pulsar Cluster/PreFred Rx091          L2 Pulsar SVT Tx092          L2 Pulsar SVT Rx093          L2 Pulsar Merger Tx094          L2 Pulsar Merger Rx095          L2 Pulsar L2TS “Tx”096          L2 Pulsar L2TS097          L2 Pulsar L1 Scaler098          L2 Pulsar SVT TF099          L2 Pulsar test Tx100          L2 Pulsar test Rx101          L2 Pulsar Stereo Tx102          L2 Pulsar Stereo Rx Sakari Franco Tomi Sakari Tomi Sakari Tomi Vadim + Sakari Tomi Sakari Tomi Sakari Sakari Sakari Sakari One Hardware -- many Firmwares What’s needed for phase I

  14. System Integration: Part I in trigger room Pulsar pre-processors L1 muon L1 XTRP L1 trigger Muon Merger Pulsar Rx L2toTS Cluster SLINK L2 CAL (CLIST/Iso) PreFred SVT Beam Tests SVT Electron ShowMax (RECES) Trigger Room with beam Room Standalone Firmware Fine tune Pulsar Monitoring Merger

  15. Pulsar Crate in Trigger Room Pulsar Tx B0L2PU00 B0L2PU00 SVT SVT L2 Muons Muon 1/3 RECES CList ISOList XTRP Level2_Pulsar_00 Reces CList Master Cluster Slink Rx Merger Run IIa Level 2 Decision Crate a - Processor Connections: Fibers LVDS SlinkPulsar Test pattern

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